公开(公告)号：US06745120B2

公开(公告)日：2004-06-01

申请号：US10263756

申请日：2002-10-04

申请人： Yuki Iwagami ,  Kohji Hashimoto ,  Hiroshi Gokan ,  Junya Tanaka

发明人： Yuki Iwagami ,  Kohji Hashimoto ,  Hiroshi Gokan ,  Junya Tanaka

IPC分类号： G06F1300

CPC分类号： F02D41/28 ,  F02D41/221 ,  F02D41/266

摘要： A vehicle-mounted communication control apparatus includes: microprocessor 110a to which serial-parallel converter 117 for master station is connected; and common control circuit 120a to which serial-parallel converter 127 for substation is serial-connected to serial-parallel converter 117. The control apparatus includes first storage device 300 for storing transmission from master station to substation; distribution storage device 313 for transferring command data to device memory when command data stored in first storage device 300 is write/setting command; reply packet generation device 317 for generating up-reply information to microprocessor 110a; second storage device 320 for reading out on the principle of preceding input or preceding output while storing in order reply information and evacuating the delay; and reply packet composing device 338 for adding latest information to reply information and sending back resultant reply information.

摘要翻译： 车载通信控制装置包括：主站串行并行转换器117连接到的微处理器110a; 以及用于变电站的并联转换器127串行连接到串行 - 并行转换器117的公共控制电路120a。控制装置包括用于存储从主站到变电站的传输的第一存储装置300; 分配存储装置313，用于在存储在第一存储装置300中的命令数据为写入/设置命令时将命令数据传送到设备存储器; 应答分组生成装置317，用于向微处理器110a生成上位应答信息; 第二存储装置320，用于根据先前输入或先前输出的原理读出，同时按顺序存储响应信息并排除延迟; 以及回复包合成装置338，用于将最新信息添加到应答信息中并发回所得到的应答信息。

公开(公告)号：US08994220B2

公开(公告)日：2015-03-31

申请号：US13343804

申请日：2012-01-05

申请人： Yuki Iwagami ,  Koji Hashimoto ,  Manabu Yamashita ,  Yuji Zushi ,  Mitsunori Nishida

发明人： Yuki Iwagami ,  Koji Hashimoto ,  Manabu Yamashita ,  Yuji Zushi ,  Mitsunori Nishida

IPC分类号： H04B3/00 ,  B60R16/00

CPC分类号： B60R16/00

摘要： In a vehicle-mounted electronic control device having a switching power supply in which a switching element is controlled to obtain a predetermined intermediate voltage Va stepped down from a vehicle-mounted battery, and to which a downstream side coil, a flywheel diode, and an output capacitor are connected to suppress a pulsating voltage, a circuit for suppressing reverse conduction for the switching element is provided in order to prevent that the switching element is reversely conducted and thus a charging voltage of the output capacitor is abnormally lowered when a power supply voltage Vb of the vehicle-mounted battery is abnormally lowered.

摘要翻译： 在具有开关电源的车载电子控制装置中，其中开关元件被控制以获得从车载电池下降的预定中间电压Va，并且下游侧线圈，续流二极管和 连接输出电容器以抑制脉动电压，为了防止开关元件反向导通，设置用于抑制反向导通的电路，因此当电源电压为0V时，输出电容器的充电电压异常降低 车载电池的Vb异常地下降。

公开(公告)号：US08321063B2

公开(公告)日：2012-11-27

申请号：US12873727

申请日：2010-09-01

申请人： Yuki Iwagami ,  Koji Hashimoto ,  Manabu Yamashita

发明人： Yuki Iwagami ,  Koji Hashimoto ,  Manabu Yamashita

IPC分类号： G06F1/28

CPC分类号： G06F1/28

摘要： An electronic control apparatus is provided in which a supervisory control circuit part capable of mutual communication with a main control circuit part, which is operated by a high speed clock signal of high precision, is operated by a medium speed clock signal, which is low in cost and precision, such that they can operate mutually independently of each other. The main control circuit part supplies a medium speed communication synchronization signal frequency divided to the supervisory control circuit part. The supervisory control circuit part is operated by the medium speed clock signal to supervise the control operation of the main control circuit part. An error measuring circuit calculates an error correction coefficient which is the ratio of the signal cycle of the communication synchronization signal to that of the medium speed clock signal. The value of the error correction coefficient is reversely supervised by the main control circuit part.

摘要翻译： 提供了一种电子控制装置，其中能够通过高精度的高速时钟信号操作的主控制电路部分相互通信的监控电路部分由低速时钟信号 成本和精度，使得它们可以彼此独立地相互操作。 主控制电路部分提供分频到监控电路部分的中速通信同步信号频率。 监控电路部分由中速时钟信号进行操作，以监控主控电路部分的控制操作。 误差测量电路计算作为通信同步信号的信号周期与中速时钟信号的信号周期之比的误差校正系数。 误差校正系数的值由主控制电路部分反向监督。

公开(公告)号：US07346002B2

公开(公告)日：2008-03-18

申请号：US10846876

申请日：2004-05-17

申请人： Kohji Hashimoto ,  Katsuya Nakamoto ,  Yuki Iwagami ,  Akihiro Ishii

发明人： Kohji Hashimoto ,  Katsuya Nakamoto ,  Yuki Iwagami ,  Akihiro Ishii

IPC分类号： G01R31/08

CPC分类号： G06F11/0757 ,  G06F11/221

摘要： A first control circuit section (master station) and a second control circuit section (substation) communicate with each other via series-parallel converters. The master station includes regular transmission device and transmission-permitting signal generation device; and the sub station includes regular report device, confirmation reply device relative to a transmission data from the master station, and an unprocessed data table. The unprocessed data table prevents jam-up in upstream communication from the sub station to the master station, enabling to carry out timely regular transmission and regular reporting. Transmission from the sub station to the master station is performed based on a transmission-permitting control signal that the master station generates. Consequently, it is possible to execute communication error processing and diminish communication control burden on the master station while properly performing the regular transmission and regular report between the master station and sub station.

摘要翻译： 第一控制电路部分（主站）和第二控制电路部分（变电站）通过串并联转换器彼此通信。 主站包括常规传输设备和传输许可信号发生设备; 并且子站包括相对于来自主站的传输数据的常规报告设备，确认回复设备和未处理的数据表。 未处理的数据表防止从子站到主站的上行通信中的卡住，能够及时定期传输和定期报告。 基于主站产生的发送允许控制信号，执行从子站到主站的传输。 因此，在主站和子站之间正常执行正常传输和定期报告的同时，可以执行通信错误处理并减少主站的通信控制负担。

公开(公告)号：US07287183B2

公开(公告)日：2007-10-23

申请号：US10788370

申请日：2004-03-01

申请人： Kohji Hashimoto ,  Katsuya Nakamoto ,  Yuki Iwagami ,  Akihiro Ishii

发明人： Kohji Hashimoto ,  Katsuya Nakamoto ,  Yuki Iwagami ,  Akihiro Ishii

IPC分类号： G06F11/00

CPC分类号： G05B23/0262 ,  B60W30/146 ,  G05B2219/24047

摘要： First and second control circuit sections that mutually communicate via a series-parallel converter comprise first and second adder-subtracter respectively. When any receiving error occurs in each control circuit section, a variation value 3 is added to the adder-subtracter on the receiving side. When data is normally received, a variation value 1 is subtracted from the adder-subtracter. Initial value of the adder-subtracter is set to 9. When a current value exceeds 11, first and second error detection signal is generated to carry out alarm display or initialization, and initialization and restart of the other-side control circuit section.

摘要翻译： 经由串并联转换器相互通信的第一和第二控制电路部分分别包括第一和第二加法器 - 减法器。 当在每个控制电路部分发生任何接收错误时，将变化值3添加到接收侧的加法器 - 减法器。 当正常接收到数据时，从加法器 - 减法器中减去变化值1。 加法器 - 减法器的初始值设置为9.当当前值超过11时，产生第一和第二错误检测信号，以进行报警显示或初始化，以及另一侧控制电路部分的初始化和重启。

公开(公告)号：US20060089756A1

公开(公告)日：2006-04-27

申请号：US11205190

申请日：2005-08-17

申请人： Yuki Iwagami ,  Junya Tanaka ,  Manabu Yamashita ,  Kohji Hashimoto

发明人： Yuki Iwagami ,  Junya Tanaka ,  Manabu Yamashita ,  Kohji Hashimoto

IPC分类号： G06F17/00

CPC分类号： H04L12/2854

摘要： A first control circuit portion carries out input/output control in cooperation with a microprocessor, a program memory, and a RAM memory. A second control circuit portion is in cooperation with the communication control circuit portion and the data memory to carry out serial communication with the first control circuit portion. A switch signal input to the second control circuit portion is stored in a first report packet, a digital conversion value for an analog signal input is stored in a second report packet, and the first and second packets are alternately periodically transmitted to the first control circuit portion. A multi-channel AD converter included in an analog signal input circuit starts to carry out AD conversion a prescribed time period after a first report packet is transmitted and finishes conversion before a second report packet is transmitted, so that up-to-date AD conversion data is transmitted.

摘要翻译： 第一控制电路部分与微处理器，程序存储器和RAM存储器协同执行输入/输出控制。 第二控制电路部分与通信控制电路部分和数据存储器协同进行与第一控制电路部分的串行通信。 输入到第二控制电路部分的开关信号被存储在第一报告分组中，用于模拟信号输入的数字转换值被存储在第二报告分组中，并且第一和第二分组被交替周期地发送到第一控制电路 一部分。 包含在模拟信号输入电路中的多通道AD转换器在发送第一报告分组之后的规定时间段开始执行AD转换，并且在发送第二报告分组之前完成转换，使得最新的AD转换 数据传输。

公开(公告)号：US20050276114A1

公开(公告)日：2005-12-15

申请号：US11033906

申请日：2005-01-13

申请人： Shoso Tsunekazu ,  Kohji Hashimoto ,  Yuki Iwagami ,  Akihiro Ishii

发明人： Shoso Tsunekazu ,  Kohji Hashimoto ,  Yuki Iwagami ,  Akihiro Ishii

IPC分类号： H04L12/40 ,  G06F13/38 ,  G11C16/06

CPC分类号： G06F13/385

摘要： In an electronic control unit, a control constant stored in a program memory is transmitted to a data memory via a serial communication circuit. First control circuit section (master station) and second control circuit section (substation) mutually communicate through series-parallel converters. The master station includes regular transmission device and storage constant confirmation processing device. The substation includes regular report device and confirmation reply device to a data transmitted from the master station. A constant set data transmitted from the master station by regular transmission device is stored in the data memory at the time of normal receiving. Confirmation information such as sum value of the entire data in the data memory is reported by regular report device. At the master station, if there is any error in the confirmation information, a constant set data is retransmitted with regular transmission device. Reliability of data in the data memory is improved.

摘要翻译： 在电子控制单元中，通过串行通信电路将存储在程序存储器中的控制常数发送到数据存储器。 第一控制电路部分（主站）和第二控制电路部分（变电站）通过串并联转换器相互通信。 主站包括常规传输设备和存储常数确认处理设备。 变电站对主站发送的数据包括常规报告设备和确认应答设备。 在正常接收时，从主站通过常规传输设备发送的恒定集合数据被存储在数据存储器中。 诸如数据存储器中的整个数据的和值的确认信息由常规报告装置报告。 在主站，如果确认信息中有任何错误，则会使用常规传输设备重传常数设置数据。 提高数据存储器中数据的可靠性。