Memory voltage generating circuit
    21.
    发明授权
    Memory voltage generating circuit 失效
    记忆电压发生电路

    公开(公告)号:US07408816B2

    公开(公告)日:2008-08-05

    申请号:US11440282

    申请日:2006-05-24

    CPC classification number: G11C5/14

    Abstract: A memory voltage generating circuit includes a first control module, a core circuit, and a second control module. The core circuit includes a regulation amplifier, a first MOSFET, a second MOSFET, and a switch. An output terminal and an inverting input terminal of the regulation amplifier are both connected to an output terminal of the core circuit. A non-inverting input terminal of the regulation amplifier is coupled to the second control module. The non-inverting input terminal of the regulation amplifier is also connected to a referenced voltage via one resistor and is grounded via another resistor. A source of the first MOSFET is coupled to the inverting input terminal of the regulation amplifier. A gate of the first MOSFET is connected to the output terminal of the regulation amplifier. Drains of the first MOSFET and the second MOSFET are coupled to an input voltage via the switch. A source of the second MOSFET is connected to another input voltage. A gate of the second MOSFET is connected to the first control module.

    Abstract translation: 存储器电压产生电路包括第一控制模块,核心电路和第二控制模块。 核心电路包括调节放大器,第一MOSFET,第二MOSFET和开关。 调节放大器的输出端子和反相输入端子都连接到核心电路的输出端子。 调节放大器的非反相输入端耦合到第二控制模块。 调节放大器的非反相输入端子也通过一个电阻器连接到参考电压,并通过另一个电阻器接地。 第一个MOSFET的源极耦合到调节放大器的反相输入端。 第一个MOSFET的栅极连接到调节放大器的输出端。 第一个MOSFET和第二个MOSFET的漏极通过开关耦合到一个输入电压。 第二个MOSFET的源极连接到另一个输入电压。 第二MOSFET的栅极连接到第一控制模块。

    Voltage generating circuit
    22.
    发明授权
    Voltage generating circuit 失效
    电压发生电路

    公开(公告)号:US07375581B2

    公开(公告)日:2008-05-20

    申请号:US11309402

    申请日:2006-08-04

    Inventor: Yong-Zhao Huang

    CPC classification number: H03K17/223 G11C5/14 G11C11/4074

    Abstract: A voltage generating circuit for providing a voltage signal to a memory in a computer is provided. The voltage generating circuit includes a voltage selecting circuit and a control circuit. The control circuit, responsive to a first and a second voltage control signal, controls the voltage selecting circuit to gate a first voltage input or a second voltage input into a terminal of a regulating transistor. Another terminal of the regulating transistor outputs the voltage signal to the memory.

    Abstract translation: 提供了一种用于向计算机中的存储器提供电压信号的电压产生电路。 电压产生电路包括电压选择电路和控制电路。 控制电路响应于第一和第二电压控制信号,控制电压选择电路将第一电压输入或输入到调节晶体管的端子的第二电压输入栅极。 调节晶体管的另一个端子将电压信号输出到存储器。

    Supply voltage switching circuit
    23.
    发明授权
    Supply voltage switching circuit 失效
    电源电压开关电路

    公开(公告)号:US07286005B2

    公开(公告)日:2007-10-23

    申请号:US11300760

    申请日:2005-12-15

    CPC classification number: H03K17/162 Y10T307/62 Y10T307/696 Y10T307/724

    Abstract: A supply voltage switching circuit for a computer includes a chipset, a first transistor, a second transistor, and a third transistor. The chipset includes a first MOSFET and a second MOSFET. A 5V system voltage and a 5V standby voltage are respectively inputted to sources of the first MOSFET and the second MOSFET. Gates of the first MOSFET and the second MOSFET are respectively coupled to collectors of the second transistor and the third transistor. A base of the first transistor is coupled to a terminal for receiving a control signal from the computer. The 5V standby voltage is inputted to a collector of the first transistor. Bases of the second transistor and the third transistor are coupled to the collector of the first transistor. A 12V system voltage and the 5V standby voltage are respectively inputted to collectors of the second transistor and the third transistor.

    Abstract translation: 用于计算机的电源电压切换电路包括芯片组,第一晶体管,第二晶体管和第三晶体管。 该芯片组包括第一MOSFET和第二MOSFET。 5V系统电压和5V待机电压分别输入到第一MOSFET和第二MOSFET的源极。 第一MOSFET和第二MOSFET的栅极分别耦合到第二晶体管和第三晶体管的集电极。 第一晶体管的基极耦合到用于从计算机接收控制信号的端子。 5V待机电压被输入到第一晶体管的集电极。 第二晶体管和第三晶体管的基极耦合到第一晶体管的集电极。 12V系统电压和5V待机电压分别输入到第二晶体管和第三晶体管的集电极。

    Linear voltage regulator with selectable output voltage
    24.
    发明授权
    Linear voltage regulator with selectable output voltage 失效
    具有可选输出电压的线性稳压器

    公开(公告)号:US07227343B2

    公开(公告)日:2007-06-05

    申请号:US11308692

    申请日:2006-04-22

    CPC classification number: G05F1/575

    Abstract: A linear voltage regulator provides a selectable output voltage to a load. The linear voltage regulator includes: a regulating circuit including an input terminal for receiving an input voltage, an output terminal for providing an output voltage to a load, and an adjusting terminal; a first resistor and a second resistor connected between the output terminal and ground for receiving the output voltage; and a voltage sampling control circuit electrically connected to a node between the first resistor and the second resistor for receiving logic signals from a controlling chip, and generating a reference current to the adjusting terminal of the regulating circuit to provide the selectable output voltage.

    Abstract translation: 线性稳压器为负载提供可选择的输出电压。 线性稳压器包括:调节电路,包括用于接收输入电压的输入端子,用于向负载提供输出电压的输出端子和调整端子; 连接在输出端子和地之间的第一电阻器和第二电阻器,用于接收输出电压; 以及电连接到第一电阻器和第二电阻器之间的节点的电压采样控制电路,用于从控制芯片接收逻辑信号,并向调节电路的调整端产生参考电流以提供可选择的输出电压。

    LINEAR VOLTAGE REGULATOR WITH SELECTABLE OUTPUT VOLTAGE
    25.
    发明申请
    LINEAR VOLTAGE REGULATOR WITH SELECTABLE OUTPUT VOLTAGE 失效
    具有可选输出电压的线性稳压器

    公开(公告)号:US20070029983A1

    公开(公告)日:2007-02-08

    申请号:US11308692

    申请日:2006-04-22

    CPC classification number: G05F1/575

    Abstract: A linear voltage regulator provides a selectable output voltage to a load. The linear voltage regulator includes: a regulating circuit including an input terminal for receiving an input voltage, an output terminal for providing an output voltage to a load, and an adjusting terminal; a first resistor and a second resistor connected between the output terminal and ground for receiving the output voltage; and a voltage sampling control circuit electrically connected to a node between the first resistor and the second resistor for receiving logic signals from a controlling chip, and generating a reference current to the adjusting terminal of the regulating circuit to provide the selectable output voltage.

    Abstract translation: 线性稳压器为负载提供可选择的输出电压。 线性稳压器包括:调节电路,包括用于接收输入电压的输入端子,用于向负载提供输出电压的输出端子和调整端子; 连接在输出端子和地之间的第一电阻器和第二电阻器,用于接收输出电压; 以及电连接到第一电阻器和第二电阻器之间的节点的电压采样控制电路,用于从控制芯片接收逻辑信号,并向调节电路的调整端产生参考电流以提供可选择的输出电压。

    Memory voltage generating circuit
    26.
    发明申请
    Memory voltage generating circuit 失效
    记忆电压发生电路

    公开(公告)号:US20060280005A1

    公开(公告)日:2006-12-14

    申请号:US11440282

    申请日:2006-05-24

    CPC classification number: G11C5/14

    Abstract: A memory voltage generating circuit includes a first control module, a core circuit, and a second control module. The core circuit includes a regulation amplifier, a first MOSFET, a second MOSFET, and a switch. An output terminal and an inverting input terminal of the regulation amplifier are both connected to an output terminal of the core circuit. A non-inverting input terminal of the regulation amplifier is coupled to the second control module. The non-inverting input terminal of the regulation amplifier is also connected to a referenced voltage via one resistor and is grounded via another resistor. A source of the first MOSFET is coupled to the inverting input terminal of the regulation amplifier. A gate of the first MOSFET is connected to the output terminal of the regulation amplifier. Drains of the first MOSFET and the second MOSFET are coupled to an input voltage via the switch. A source of the second MOSFET is connected to another input voltage. A gate of the second MOSFET is connected to the first control module.

    Abstract translation: 存储器电压产生电路包括第一控制模块,核心电路和第二控制模块。 核心电路包括调节放大器,第一MOSFET,第二MOSFET和开关。 调节放大器的输出端子和反相输入端子都连接到核心电路的输出端子。 调节放大器的非反相输入端耦合到第二控制模块。 调节放大器的非反相输入端子也通过一个电阻器连接到参考电压,并通过另一个电阻器接地。 第一个MOSFET的源极耦合到调节放大器的反相输入端。 第一个MOSFET的栅极连接到调节放大器的输出端。 第一个MOSFET和第二个MOSFET的漏极通过开关耦合到一个输入电压。 第二个MOSFET的源极连接到另一个输入电压。 第二MOSFET的栅极连接到第一控制模块。

    CONTROL CIRCUIT FOR COMMAND SIGNALS OF CLOCK GENERATOR
    27.
    发明申请
    CONTROL CIRCUIT FOR COMMAND SIGNALS OF CLOCK GENERATOR 失效
    时钟发生器命令信号控制电路

    公开(公告)号:US20060232324A1

    公开(公告)日:2006-10-19

    申请号:US11306922

    申请日:2006-01-17

    CPC classification number: G11C7/22 G11C7/222 H03K17/74

    Abstract: A control circuit for command signals of a clock generator includes a power supply end, an output end, a control end, a diode, a first resistor and a second resistor. The first resistor, the diode, and the second resistor are connected in series between the power supply end and the ground. The diode has an anode connected to the first resistor and a cathode connected to the second resistor. The control end is connected to a node between the diode and the second resistor; the output end is connected to a node between the diode and the first resistor. The output end outputs the command signals to the clock generator.

    Abstract translation: 用于时钟发生器的指令信号的控制电路包括电源端,输出端,控制端,二极管,第一电阻和第二电阻。 第一个电阻,二极管和第二个电阻串联在电源端和地之间。 二极管具有连接到第一电阻器的阳极和连接到第二电阻器的阴极。 控制端连接到二极管和第二电阻之间的节点; 输出端连接到二极管和第一个电阻之间的一个节点。 输出端将命令信号输出到时钟发生器。

    Power supply for a bus interface
    28.
    发明申请
    Power supply for a bus interface 审中-公开
    总线接口电源

    公开(公告)号:US20060227481A1

    公开(公告)日:2006-10-12

    申请号:US11388258

    申请日:2006-03-24

    CPC classification number: G06F1/26 H02H3/087

    Abstract: A power supply for a bus interface is provided. The power supply comprises: an input terminal; an output terminal; a fuse providing over-current protection; a diode providing over-voltage protection, a reverse breakdown voltage of the diode not less than a maximal voltage difference of the output terminal and the input terminal, the diode connected to the fuse in series between an input terminal and an output terminal; and a plurality of capacitors filtering noise, one end of each of the capacitors connected to a node between the fuse and an anode of the diode, and another end of each of the capacitors is grounded. The power supply can provide effective over-voltage protection because a reverse breakdown voltage of the diode is not less than a maximal voltage difference of the output terminal and the input terminal. In addition, the power supply has a low cost of manufacture.

    Abstract translation: 提供总线接口的电源。 电源包括:输入端子; 输出端子; 保险丝提供过流保护; 提供过电压保护的二极管,二极管的反向击穿电压不小于输出端子和输入端子的最大电压差,二极管连接到输入端子和输出端子之间的熔丝; 并且多个电容器滤除噪声,每个电容器的一端连接到熔丝和二极管的阳极之间的节点,并且每个电容器的另一端接地。 电源可以提供有效的过电压保护,因为二极管的反向击穿电压不小于输出端子和输入端子的最大电压差。 另外,电源的制造成本低。

    Voltage providing circuit
    29.
    发明申请
    Voltage providing circuit 失效
    电压提供电路

    公开(公告)号:US20060197582A1

    公开(公告)日:2006-09-07

    申请号:US11365640

    申请日:2006-02-28

    CPC classification number: G11C5/14

    Abstract: A voltage providing circuit includes a protective circuit and a power supply circuit. The protective circuit includes a first transistor. A first control signal is input to a collector of the first transistor, a second control signal is input to a base of the first transistor, an emitter of the first transistor is grounded. The collector of the first transistor is connected to the power supply circuit. The second control signal and the first control signal jointly control the power supply circuit to be turned on or turned off. When the second control signal is at a low level, the first transistor is turned off and the power supply circuit is turned off. When the second control signal is at a high level, the first transistor is turned on and the power supply circuit is turned on. Thus, the providing circuit can prevent the electronic component from being damaged when a computer is restarted.

    Abstract translation: 电压提供电路包括保护电路和电源电路。 保护电路包括第一晶体管。 第一控制信号被输入到第一晶体管的集电极,第二控制信号被输入到第一晶体管的基极,第一晶体管的发射极接地。 第一晶体管的集电极连接到电源电路。 第二控制信号和第一控制信号共同控制电源电路被接通或断开。 当第二控制信号为低电平时,第一晶体管截止,电源电路断开。 当第二控制信号为高电平时,第一晶体管导通,电源电路接通。 因此,当计算机重启时,提供电路可以防止电子部件损坏。

    Signal generating circuit
    30.
    发明申请
    Signal generating circuit 失效
    信号发生电路

    公开(公告)号:US20060145731A1

    公开(公告)日:2006-07-06

    申请号:US11321194

    申请日:2005-12-29

    CPC classification number: H03K17/22 G01R19/16538

    Abstract: A power good signal generating circuit includes an NPN transistor, a first resistor, a second resistor, a third resistor, a first power source, and a second power source. The first resistor is connected between a base of the transistor and the first power source. The second resistor is connected between a collector of the transistor and the second power source. The third resistor is connected between an emitter of the transistor and ground. The collector is connected to an output for sending a PG signal and the emitter is connected to an input for receiving a control signal P.

    Abstract translation: 功率良好信号发生电路包括NPN晶体管,第一电阻器,第二电阻器,第三电阻器,第一电源和第二电源。 第一电阻器连接在晶体管的基极和第一电源之间。 第二电阻器连接在晶体管的集电极和第二电源之间。 第三电阻连接在晶体管的发射极和地之间。 集电极连接到用于发送PG信号的输出端,发射极连接到用于接收控制信号P的输入端。

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