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公开(公告)号：US10147202B2
公开(公告)日：2018-12-04
申请号：US13836887
申请日：2013-03-15
Applicant: ARM Limited
Inventor： Jorn Nystad , Anders Lassen
IPC: G06T9/00
Abstract: To encode a texture to be used in a graphics processing system, the texture is first downscaled to generate a lower resolution representation of the texture 41. An upscaled version 42 of the lower resolution version of the texture is then compared to the original texture to determine a set of difference values indicating for each texel the difference between the value of the texel in the upscaled version of the texture and in the original texture 43. An encoded texture data block is then generated for each 8×8 block of texels in the original texture 44. Each encoded texture data block contains a base color value taken from the lower resolution representation of the texture and a set of index values indicating the difference data from the determined set of difference data to be used when decoding the block of texture data to generate the data values to be used for the texture data elements that the block of texture data represents.
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公开(公告)号：US09947131B2
公开(公告)日：2018-04-17
申请号：US15161339
申请日：2016-05-23
Applicant: ARM Limited
Inventor： Jorn Nystad , Borgar Ljosland , Edvard Sorgard
CPC classification number: G06T15/405 , G06T15/005 , G06T15/08 , G06T15/40 , G06T15/80 , G06T17/20
Abstract: When rendering a scene that includes a complex object made up of many individual primitives, rather than processing each primitive making up the object in turn, a bounding volume which surrounds the complex object is generated and the scene is then processed using the bounding volume in place of the actual primitives making up the complex object. If it is determined that the bounding volume representation of the object will be completely occluded in the scene (e.g. by a foreground object), then the individual primitives making up the complex object are not processed. This can save significantly on processing time and resources for the scene.
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公开(公告)号：US09865084B2
公开(公告)日：2018-01-09
申请号：US14605944
申请日：2015-01-26
Applicant: ARM LIMITED
Inventor： Jorn Nystad , Aske Simon Christensen
CPC classification number: G06T15/80 , G06T1/20 , G06T15/005 , G06T2200/04
Abstract: A graphics processor includes a vertex shader 20 that processes input attribute values from a vertex buffer 26 to generate output vertex shaded attribute values 28 to be used by a rasterizer/fragment shader 22 of the graphics processor when processing an image for display. Vertex shader output attributes for which the vertex shader input attributes that the vertex shader output attribute depends on are defined solely on a per-vertex basis or solely on a per-instance basis are identified. Then, for such vertex shader output attributes, the vertex shader 20 stores, for use by the rasterizer/fragment shader 22 of the graphics processor when processing an image for display, only one copy of the vertex shader output attribute for a given vertex or instance, respectively, irrespective of the number of instances or vertices, respectively, that the output attribute value applies to.
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公开(公告)号：US09767595B2
公开(公告)日：2017-09-19
申请号：US13875822
申请日：2013-05-02
Applicant: ARM Limited
Inventor： Jorn Nystad , Andreas Engh-Halstvedt , Sandeep Kakarlapudi , Michael Stokes
CPC classification number: G06T15/005
Abstract: A tile-based graphics processing pipeline 1 comprising a rasteriser 3, a renderer 6, a tile buffer 10, a write out stage 13 and a programmable processing stage 14. The tile buffer 10 stores multiple render targets for a deferred shading operation and the programmable processing stage 14 is operable to, under the control of graphics program instructions, read data from two or more of a set of multiple render targets for a deferred shading operation stored in the tile buffer 10, perform a deferred shading processing operation using the read data, and to write the result of the processing operation to an output render target in the tile buffer 10, or to external memory.
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公开(公告)号：US09607356B2
公开(公告)日：2017-03-28
申请号：US13875810
申请日：2013-05-02
Applicant: ARM Limited
Inventor： Anders Lassen , Jorn Nystad
CPC classification number: G06T1/60 , G06T11/001 , G06T11/40 , G06T15/005 , G09G5/39 , G09G2360/122
Abstract: A tile-based graphics processing pipeline comprising a rasteriser 3, a renderer 6, a tile buffer 10 configured to store rendered fragment data locally to the graphics processing pipeline prior to that data being written out to an external memory, a write out stage 13 configured to write data stored in the tile buffer to an external memory, and a programmable processing stage 14. The programmable processing stage 14 is operable under the control of graphics program instructions to read fragment data stored in the tile buffer 10 on a random access basis, perform a processing operation using the read fragment data, and write the result of the processing operation into the tile buffer 10 or to an external memory.
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Patent Agency Ranking
公开(公告)号：US20170032488A1
公开(公告)日：2017-02-02
申请号：US15218015
申请日：2016-07-23
Applicant: ARM Limited
Inventor： Jorn Nystad
IPC: G06T1/20
CPC classification number: G06T1/20
Abstract: In a graphics processor, the rasteriser operates to identify pairs of fragments for a primitive being rendered for which not all the sampling positions in the fragments are covered by the primitive.When the fragments reach the fragment shader, corresponding execution threads are spawned for execution by the fragment shader to process the fragments.A first part of the fragment shader program that uses the helper threads of the thread groups is then executed.There is then a merge instruction in the fragment shader program which operates to cause the active threads of the thread groups to be merged into a single, combined thread group.Following this thread group merger, the remaining program steps of the fragment shader program are executed for the merged thread group.
Abstract translation: 在这个线程组合并之后，为合并的线程组执行片段着色器程序的其余程序步骤。
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公开(公告)号：US09524566B2
公开(公告)日：2016-12-20
申请号：US14704962
申请日：2015-05-05
Applicant: ARM LIMITED
Inventor： Jorn Nystad , Anders Lassen
CPC classification number: G06T1/20 , G06T9/00 , G06T9/005 , G06T11/001 , H04N19/90
Abstract: Each block of texture data elements is encoded as a block of texture data that includes: data indicating how to generate a set of data values to be used to generate data values for a set of the texture data elements that the block represents; data indicating a set of integer values to be used to generate the set of data values to be used to generate data values for a set of the texture data elements that the block represents; data indicating a set of index values indicating how to use the generated set of data values to generate data values for texture data elements of the set of texture data elements that the generated set of data values is to be used for; and data indicating the indexing scheme that has been used for the block.
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公开(公告)号：US20160267702A1
公开(公告)日：2016-09-15
申请号：US15061480
申请日：2016-03-04
Applicant: ARM Limited
Inventor： Jorn Nystad
CPC classification number: G06T15/04 , G06T11/001
Abstract: When sampling a cube map when rendering in a graphics processing system, the vector representation of the desired cube map sample provided by the application is converted into a 2D position on one of the faces of the cube map for use by the texturing unit of the graphics processing pipeline.The determined 2D texture coordinates (S, T) are represented using standard 32-bit IEEE 754 floating point numbers, and the 3-bit face index for the cube map is included in one of the numbers representing the texture coordinates by packing it into the sign bit and the top two bits of the exponent to provide a modified texture coordinate value.The modified 32-bit texture coordinate representation is then provided together with the 32-bit floating point number corresponding to the other texture coordinate as the cube map descriptor to the texturing unit of the graphics processing pipeline.
Abstract translation: 然后将经修改的32位纹理坐标表示与对应于另一个纹理坐标的32位浮点数作为立方映射描述符一起提供给图形处理流水线的纹理单元。
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公开(公告)号：US09218793B2
公开(公告)日：2015-12-22
申请号：US13658997
申请日：2012-10-24
Applicant: ARM LIMITED
Inventor： Sandeep Kakarlapudi , Jorn Nystad
CPC classification number: G09G5/377 , G06T11/40 , G06T15/005 , G09G5/363 , G09G2360/06 , G09G2360/122
Abstract: A tile-based graphics processor includes tile processing circuitry that has both a tile buffer and a per-pixel general purpose data store. The per-pixel general purpose data store is read accessible and write accessible by the tile processing circuitry to store intermediate values. These intermediate values are generated by the tile processing circuitry and then consumed by the tile processing circuitry to generate the output values for the tile being processed.
Abstract translation: 基于瓦片的图形处理器包括具有瓦片缓冲器和每像素通用数据存储器的瓦片处理电路。 每像素通用数据存储器被读取可访问并且可由片处理电路写入以存储中间值。 这些中间值由瓦片处理电路产生，然后由瓦片处理电路消耗以产生正被处理的瓦片的输出值。
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公开(公告)号：US09153070B2
公开(公告)日：2015-10-06
申请号：US13716952
申请日：2012-12-17
Applicant: ARM Limited
Inventor： Jorn Nystad , Edvard Sorgard , Frode Heggelund
Abstract: The early depth test stages 4, 13 of a graphics processing pipeline 1 are configured to broadcast information 9, 10, 11, 14 about fragments, etc., that pass those early depth tests to other stages 3, 4, 6, 12 in the pipeline. The other stages in the pipeline then use the early depth test pass information to determine if the processing of any fragments that they are currently processing can be stopped.
Abstract translation: 图形处理流水线1的早期深度测试阶段4,13被配置为将关于通过这些早期深度测试的片段等的信息9,10,11,14广播到其他阶段3,4,6,12中 管道。 管道中的其他阶段然后使用早期深度测试通过信息来确定它们当前处理的任何片段的处理是否可以被停止。
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