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    SYSTEMS AND METHODS FOR TRANSPORTING A CLOCK SIGNAL OVER A NETWORK
    21.
    发明申请
    SYSTEMS AND METHODS FOR TRANSPORTING A CLOCK SIGNAL OVER A NETWORK 有权
    用于在网络上传输时钟信号的系统和方法

    公开(公告)号：US20140192797A1

    公开(公告)日：2014-07-10

    申请号：US14150698

    申请日：2014-01-08

    Applicant: Aviat U.S., Inc.

    Inventor： Sergio Licardie ,  Ivana Maric

    IPC: H04W56/00

    CPC classification number: H04J3/0658

    Abstract: According to some embodiments, a master device sends synchronization packets to one or more slave devices, and does so periodically based on a master clock signal having a master clock frequency. At each of the slave devices, an algorithm estimates the master clock frequency based on the timing of synchronization packet arrivals the slave device. The algorithm may estimate the master clock frequency using both the currently-observed timing of synchronization packet arrivals and the history of previous synchronization packet arrivals (e.g., previously-observed timing of synchronization packet arrivals). Based on the estimated master clock frequency, each of the one or more slave devices can update the frequency of their respective slave clock signal (e.g., using a frequency offset) to match that of the estimated master clock frequency.

    Abstract translation: 根据一些实施例，主设备向一个或多个从设备发送同步分组，并且基于具有主时钟频率的主时钟信号周期性地执行。 在每个从设备中，算法基于同步分组到达从设备的定时估计主时钟频率。 该算法可以使用当前观察到的同步分组到达的定时和先前的同步分组到达的历史（例如，先前观察到的同步分组到达的定时）来估计主时钟频率。 基于估计的主时钟频率，一个或多个从属设备中的每一个可以更新它们各自的从时钟信号的频率（例如，使用频率偏移）来匹配估计的主时钟频率的频率。

    Systems and methods for in-line interference detection in point-to-point radio links
    23.
    发明授权
    Systems and methods for in-line interference detection in point-to-point radio links 有权

    公开(公告)号：US11581963B2

    公开(公告)日：2023-02-14

    申请号：US17724370

    申请日：2022-04-19

    Applicant: Aviat U.S., Inc.

    Inventor： Gary Croke ,  Sergio Licardie ,  Robert Vilhar ,  Sreco Plevel ,  Marius Koegelenberg

    IPC: H04B17/345 ,  H04B1/10

    Abstract: An interference detection system comprises memory storing computer instructions to cause a processor to perform gathering a temporal snapshot of radio parameter values associated with a first site of a point-to-point radio system, the radio parameter values including at least a receive signal level (RSL) value and at least one other radio parameter value correlated with signal degradation; determining whether the RSL value is greater than an RSL threshold; determining whether the other radio parameter value indicates a threshold level of signal degradation; when the RSL is greater than the RSL threshold and the other parameter indicates a threshold level of signal degradation during the temporal snapshot, determining that external interference is present during the temporal snapshot; when the RSL is not greater than the RSL threshold, determining that the external interference is not present; and performing a responsive action to a determination of the external interference being likely present.

    SYSTEMS AND METHODS FOR PERFORMING LAYER ONE LINK AGGREGATION OVER WIRELESS LINKS
    24.
    发明申请
    SYSTEMS AND METHODS FOR PERFORMING LAYER ONE LINK AGGREGATION OVER WIRELESS LINKS 有权

    公开(公告)号：US20220174001A1

    公开(公告)日：2022-06-02

    申请号：US17516204

    申请日：2021-11-01

    Applicant: Aviat U.S., Inc.

    Inventor： Chaoming Zeng ,  Sergio Licardie

    IPC: H04L45/24 ,  H04W24/04 ,  H04W76/15 ,  H04L69/14 ,  H04B7/10 ,  H04L1/00 ,  H04L12/46 ,  H04L45/00 ,  H04L47/41

    Abstract: A first layer one link aggregation master comprises a first port coupled to receive customer traffic; a first channel; a second channel; an aggregation engine coupled to the first and second channels; a first switch circuit coupled to the first port and to the first channel, and configured to communicate the customer traffic from the first port over the first channel to the aggregation engine, the aggregation engine including a splitter circuit configured to use layer one information to segment at least a portion of the customer traffic into a first virtual container and a second virtual container, the aggregation engine further including an encapsulation circuit configured to encapsulate the second virtual container using Ethernet standards for transport over the second channel; a radio access card configured to generate an air frame based on the first virtual container for wireless transmission over a first wireless link of a link aggregation group to the receiver; and a second switch circuit coupled to the second channel, and configured to communicate the Ethernet-encapsulated second virtual container over an Ethernet cable to a slave for wireless transmission over a second wireless link of the link aggregation group to the receiver.

    MANAGING INTEGRITY OF FRAMED PAYLOADS USING REDUNDANT SIGNALS
    25.
    发明申请
    MANAGING INTEGRITY OF FRAMED PAYLOADS USING REDUNDANT SIGNALS 审中-公开

    公开(公告)号：US20200099470A1

    公开(公告)日：2020-03-26

    申请号：US16698126

    申请日：2019-11-27

    Applicant: Aviat U.S., Inc.

    Inventor： Sergio Licardie ,  Rishipal Arya ,  Robert Brown

    IPC: H04L1/00 ,  H04B7/08 ,  H03M13/37 ,  H03M13/47 ,  H03M13/45 ,  H03M13/00

    Abstract: A frame error correction circuit may identify and correct errors in data frames provided to a receiver as part of a diversity communications scheme. The frame error correction circuit may further align the data frames so that the data frames can be compared. The frame error correction circuit may perform a bit-wise comparison of the data frames and identify inconsistent bit positions where bits in the data frames differ from one another. Once inconsistent bit positions have been identified, the frame error correction circuit may access a permutation table of permutations of bits at the inconsistent bit positions. In some implementations, the frame error correction circuit uses the permutation table to reassemble permutations of the data frames. In various implementations, the frame error correction circuit performs a CRC of each permutation of the data frames, and provides a valid permutation to a network.

    Systems and methods for performing layer one link aggregation over wireless links
    26.
    发明授权
    Systems and methods for performing layer one link aggregation over wireless links 有权

    公开(公告)号：US10536369B2

    公开(公告)日：2020-01-14

    申请号：US16141879

    申请日：2018-09-25

    Applicant: Aviat U.S., Inc.

    Inventor： Chaoming Zeng ,  Sergio Licardie

    IPC: H04L12/709 ,  H04W24/04 ,  H04W76/15 ,  H04L29/06 ,  H04B7/10 ,  H04L1/00 ,  H04L12/46 ,  H04L12/721 ,  H04L12/891 ,  H04L29/08

    Abstract: A first layer one link aggregation master comprises a first port coupled to receive customer traffic; a first channel; a second channel; an aggregation engine coupled to the first and second channels; a first switch circuit coupled to the first port and to the first channel, and configured to communicate the customer traffic from the first port over the first channel to the aggregation engine, the aggregation engine including a splitter circuit configured to use layer one information to segment at least a portion of the customer traffic into a first virtual container and a second virtual container, the aggregation engine further including an encapsulation circuit configured to encapsulate the second virtual container using Ethernet standards for transport over the second channel; a radio access card configured to generate an air frame based on the first virtual container for wireless transmission over a first wireless link of a link aggregation group to the receiver; and a second switch circuit coupled to the second channel, and configured to communicate the Ethernet-encapsulated second virtual container over an Ethernet cable to a slave for wireless transmission over a second wireless link of the link aggregation group to the receiver.

    SYSTEM AND METHOD FOR RESILIENT WIRELESS PACKET COMMUNICATIONS
    27.
    发明申请
    SYSTEM AND METHOD FOR RESILIENT WIRELESS PACKET COMMUNICATIONS 审中-公开

    公开(公告)号：US20190044791A1

    公开(公告)日：2019-02-07

    申请号：US16150192

    申请日：2018-10-02

    Applicant: Aviat U.S., Inc.

    Inventor： Alain Hourtane ,  Sergio Licardie ,  Chaoming Zeng

    IPC: H04L12/24 ,  H04W24/04 ,  H04L12/703 ,  H04L12/42 ,  H04L12/701

    Abstract: Rapid failure detection and recovery in wireless communication networks is needed in order to meet, among other things, carrier class Ethernet transport channel standards. Thus, resilient wireless packet communications is provided using a hardware-assisted rapid transport channel failure detection algorithm and a Gigabit Ethernet data access card with an engine configured accordingly. In networks with various topologies, this is provided in combination with their existing protocols, such as rapid spanning tree and link aggregation protocols, respectively.

    System and method for resilient wireless packet communications
    28.
    发明授权
    System and method for resilient wireless packet communications 有权

    公开(公告)号：US10091051B2

    公开(公告)日：2018-10-02

    申请号：US15653485

    申请日：2017-07-18

    Applicant: Aviat U.S., Inc.

    Inventor： Alain Hourtane ,  Sergio Licardie ,  Chaoming Zeng

    IPC: H04L12/24 ,  H04W24/04 ,  H04L12/703 ,  H04L12/701 ,  H04L12/42

    Abstract: Rapid failure detection and recovery in wireless communication networks is needed in order to meet, among other things, carrier class Ethernet transport channel standards. Thus, resilient wireless packet communications is provided using a hardware-assisted rapid transport channel failure detection algorithm and a Gigabit Ethernet data access card with an engine configured accordingly. In networks with various topologies, this is provided in combination with their existing protocols, such as rapid spanning tree and link aggregation protocols, respectively.

    Systems and methods for transporting a clock signal over a network
    30.
    发明授权
    Systems and methods for transporting a clock signal over a network 有权

    公开(公告)号：US09825724B2

    公开(公告)日：2017-11-21

    申请号：US14150698

    申请日：2014-01-08

    Applicant: Aviat U.S., Inc.

    Inventor： Sergio Licardie ,  Ivana Maric

    IPC: H04J3/06

    CPC classification number: H04J3/0658

    Abstract: According to some embodiments, a master device sends synchronization packets to one or more slave devices, and does so periodically based on a master clock signal having a master clock frequency. At each of the slave devices, an algorithm estimates the master clock frequency based on the timing of synchronization packet arrivals the slave device. The algorithm may estimate the master clock frequency using both the currently-observed timing of synchronization packet arrivals and the history of previous synchronization packet arrivals (e.g., previously-observed timing of synchronization packet arrivals). Based on the estimated master clock frequency, each of the one or more slave devices can update the frequency of their respective slave clock signal (e.g., using a frequency offset) to match that of the estimated master clock frequency.

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