Controller for storage unit and method of controlling storage unit
    22.
    发明授权
    Controller for storage unit and method of controlling storage unit 失效
    存储单元控制器和控制存储单元的方法

    公开(公告)号:US5418929A

    公开(公告)日:1995-05-23

    申请号:US187500

    申请日:1994-01-28

    IPC分类号: G06F12/08 G06F12/12 G06F13/00

    摘要: In allocating an area of a cache memory to each storage unit, proper allocation of the cache memory is made to each storage unit. If the amount of write-after data becomes equal to or more than a threshold value, an allocation limit is set to each disk unit. If CPU issues a data write request requiring the amount of data equal to or more than the allocation limit, the data write request is held in a wait state until the amount of write-after data becomes less than the allocation limit. Therefore, the allocation amount to the disk unit becomes neither too large nor too small. In this manner, proper allocation of the cache memory to each disk unit can be realized.

    摘要翻译: 在向每个存储单元分配高速缓冲存储器的区域时,对每个存储单元进行高速缓冲存储器的适当分配。 如果写入数据量等于或大于阈值,则对每个盘单元设置分配限制。 如果CPU发出数据写请求,要求数据量等于或大于分配限制,则数据写入请求将保持在等待状态,直到写入数据量小于分配限制为止。 因此,对于盘单元的分配量既不太大也不太小。 以这种方式,可以实现对每个盘单元的高速缓冲存储器的适当分配。

    Controller for storage unit and method of controlling storage unit
    23.
    发明授权
    Controller for storage unit and method of controlling storage unit 失效
    存储单元控制器和控制存储单元的方法

    公开(公告)号:US5307473A

    公开(公告)日:1994-04-26

    申请号:US833129

    申请日:1992-02-10

    IPC分类号: G06F12/08 G06F12/12 G06F13/00

    摘要: In allocating an area of a cache memory to each storage unit, proper allocation of the cache memory is made to each storage unit. If the amount of write-after data becomes equal to or more than a threshold value, an allocation limit is set to each disk unit. If CPU issues a data write request requiring the amount of data equal to or more than the allocation limit, the data write request is held in a wait state until the amount of write-after data becomes less than the allocation limit. Therefore, the allocation amount to the disk unit becomes neither too large nor too small. In this manner, proper allocation of the cache memory to each disk unit can be realized.

    摘要翻译: 在向每个存储单元分配高速缓冲存储器的区域时,对每个存储单元进行高速缓冲存储器的适当分配。 如果写入数据量等于或大于阈值,则对每个盘单元设置分配限制。 如果CPU发出数据写请求,要求数据量等于或大于分配限制,则数据写入请求将保持在等待状态,直到写入数据量小于分配限制为止。 因此,对于盘单元的分配量既不太大也不太小。 以这种方式,可以实现对每个盘单元的高速缓冲存储器的适当分配。

    Buffered peripheral system and method for backing up and retrieving data
to and from backup memory device
    24.
    发明授权
    Buffered peripheral system and method for backing up and retrieving data to and from backup memory device 失效
    缓冲外设系统和备份和备份存储设备数据的方法

    公开(公告)号:US5193154A

    公开(公告)日:1993-03-09

    申请号:US783718

    申请日:1991-10-25

    IPC分类号: G06F13/00

    CPC分类号: G06F13/00 Y10S707/99955

    摘要: A buffered peripheral system comprises a backup memory and a primary control unit which has a buffer memory for temporarily storing a copy of the contents of a buffer memory which stores data to be written to a peripheral device and a control device for issuing a command necessary to write the block stored in the buffer memory device to the peripheral device. The primary control unit also includes a recording device for recording the block number corresponding to the block which was most recently written to the peripheral device. The blocks of data which have been written to the peripheral device is then deleted from the backup memory to make room for storing further blocks of data. The system further has a backup control unit substantially identical to the primary control unit. Only the primary control unit normally operates to control the writing to the peripheral device. Upon detection of the failure of the buffer memory in the primary control unit, the backup control unit completes the operation of writing to the peripheral device by retrieving the blocks of data to be written to the peripheral device from the backup memory device using the block number information.

    摘要翻译: 缓冲外设系统包括备用存储器和主控单元,该主控制单元具有缓冲存储器,用于临时存储要写入外围设备的数据的缓冲存储器的内容副本以及用于发出必要的命令的控制装置 将存储在缓冲存储器件中的块写入外围设备。 主控制单元还包括用于记录与最近写入外围设备的块相对应的块号的记录装置。 已经写入外围设备的数据块然后从备份存储器中删除,为存储更多的数据块腾出空间。 该系统还具有与主控制单元基本相同的备用控制单元。 只有主控制单元通常操作才能控制对外围设备的写入。 在检测到主控制单元中的缓冲存储器的故障时,备用控制单元通过使用块号从备用存储装置检索要写入外围设备的数据块来完成对外围装置的写入操作 信息。

    Storage unit subsystem
    26.
    发明授权
    Storage unit subsystem 失效
    存储单元子系统

    公开(公告)号:US07320089B2

    公开(公告)日:2008-01-15

    申请号:US10945882

    申请日:2004-09-22

    IPC分类号: G06F11/00

    CPC分类号: G06F11/1076 G06F2211/1009

    摘要: When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.

    摘要翻译: 当从处理器接收到写请求时,控制单元检查高速缓存中存在(或存在/不存在)的状况,以产生奇偶校验记录的更新值所需的信息,接收写数据并报告完成 向处理器写请求。 在与来自处理器的写入请求不同步的情况下,控制单元在产生可能与来自处理器的写请求异步准备的奇偶校验记录的更新值所需的信息之间执行该信息的加载处理和写入 后续处理更新的奇偶校验记录值。

    Storage unit subsystem
    27.
    发明授权
    Storage unit subsystem 失效
    存储单元子系统

    公开(公告)号:US06757839B2

    公开(公告)日:2004-06-29

    申请号:US10319501

    申请日:2002-12-16

    IPC分类号: G06F1100

    CPC分类号: G06F11/1076 G06F2211/1009

    摘要: When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.

    摘要翻译: 当从处理器接收到写请求时,控制单元检查高速缓存中存在(或存在/不存在)的状况,以产生奇偶校验记录的更新值所需的信息,接收写数据并报告完成 向处理器写请求。 在与来自处理器的写入请求不同步的情况下,控制单元在产生可能与来自处理器的写请求异步准备的奇偶校验记录的更新值所需的信息之间执行该信息的加载处理和写入 后续处理更新的奇偶校验记录值。

    Storage unit subsystem
    28.
    发明授权

    公开(公告)号:US06532549B2

    公开(公告)日:2003-03-11

    申请号:US09956792

    申请日:2001-09-21

    IPC分类号: G06F1100

    CPC分类号: G06F11/1076 G06F2211/1009

    摘要: When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.

    Storage unit subsystem
    29.
    发明授权
    Storage unit subsystem 失效
    存储单元子系统

    公开(公告)号:US06327673B1

    公开(公告)日:2001-12-04

    申请号:US09642815

    申请日:2000-08-22

    IPC分类号: G06F1100

    CPC分类号: G06F11/1076 G06F2211/1009

    摘要: When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.

    摘要翻译: 当从处理器接收到写请求时,控制单元检查高速缓存中存在(或存在/不存在)的状况,以产生奇偶校验记录的更新值所需的信息,接收写数据并报告完成 向处理器写请求。 在与来自处理器的写入请求不同步的情况下,控制单元在产生可能与来自处理器的写请求异步准备的奇偶校验记录的更新值所需的信息之间执行该信息的加载处理和写入 后续处理更新的奇偶校验记录值。