公开(公告)号：US11125817B2

公开(公告)日：2021-09-21

申请号：US16600917

申请日：2019-10-14

Applicant: Analog Devices, Inc.

Inventor： Christopher C. McQuilkin

IPC: H04K1/02 ,  H04L25/03 ,  H04L25/49 ,  G01R31/317 ,  H03F3/21 ,  G01R31/3177 ,  H03G3/30

Abstract: A test system can use first and different second driver stages to provide test signals to a device under test (DUT). A compound stage can receive signals from the driver stages and provide a voltage output signal to the DUT, such as via a gain circuit. The compound stage can include a buffer circuit configured to provide a first portion of the voltage output signal based on a first output signal from the first driver stage, and the compound stage can include a transimpedance circuit configured to provide a second portion of the voltage output signal based on a second output signal from the second driver stage. In an example, the gain circuit can receive a superposition signal comprising the first and second portions of the voltage output signal and, in response, provide a test signal to the DUT.

公开(公告)号：US20170336473A1

公开(公告)日：2017-11-23

申请号：US15162171

申请日：2016-05-23

Applicant: Analog Devices, Inc.

Inventor： Christopher C. McQuilkin

IPC: G01R31/3183 ,  H03K17/74

CPC classification number: G01R31/31928

Abstract: A multiple-level driver circuit, such as for providing several different signals to a device under test (DUT) in an automated test system, can include multiple diode bridge circuits. In an example, a first diode bridge circuit is configured to receive a multiple-valued input voltage signal, having at least two different DC voltage signal levels, at an input node and, in response, to selectively provide a corresponding multiple-valued output voltage signal at an output node. The first diode bridge circuit can operate in a conducting and non-commutated state when it is used to selectively provide the multiple-valued output voltage signal at the output node.

公开(公告)号：US09813050B1

公开(公告)日：2017-11-07

申请号：US15097954

申请日：2016-04-13

Applicant: Analog Devices, Inc.

Inventor： Christopher C. McQuilkin

IPC: H03K5/24

CPC classification number: H03K5/2418 ,  H03K5/24 ,  H03K5/2409

Abstract: A comparator circuit's signal range can be enhanced using an input signal attenuation circuit. In an example, a comparator circuit receives an input signal and a reference signal. The input signal can be conditioned by one or both of the attenuation circuit and a conditioning circuit, and a resulting conditioned signal can be presented to a compare element. Under first operating conditions where the input signal is approximately equal to the reference signal, the attenuation circuit can be substantially bypassed and a first resulting conditioned signal can be presented to the compare element. Under second operating conditions where the input signal is substantially greater than the reference signal, the attenuation circuit receives a portion of the input signal and a different second resulting conditioned signal can be presented to the compare element.

公开(公告)号：US20170269149A1

公开(公告)日：2017-09-21

申请号：US15074533

申请日：2016-03-18

Applicant: Analog Devices, Inc.

Inventor： Christopher C. McQuilkin

IPC: G01R31/28 ,  H03K3/012

CPC classification number: G01R31/2837 ,  H03K3/012 ,  H03K19/017509

Abstract: In a test system that provides a high fidelity output signal, a transition driving circuit can selectively enable multiple, parallel current paths based on a desired voltage transition. The transition driving circuit can include a first switch configured to switch a first current path between an output node and a first current source/sink, and a second switch configured to switch a second current path between the output node and the first current source/sink. The transition driving circuit can include a control circuit that is configured to receive information about a desired voltage transition and, depending on a magnitude of the desired voltage transition, to selectively turn on one or both of the first and second switches to enable one or both of the first and second current paths to provide respective portions of the output signal from the first current source/sink to the output node of the test system.