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公开(公告)号：US20200350819A1
公开(公告)日：2020-11-05
申请号：US16399290
申请日：2019-04-30
Applicant: Apple Inc.
Inventor： Michael Couleur , Yesim Inam , Dashun Xue
Abstract: A power converter circuit that includes a switch node coupled to a regulated power supply node via an inductor may, during a discharge cycle, sink current from the regulated power supply node. A control circuit may generate the rising and falling ramp signals using voltage levels of an input power supply node and the regulated power supply node. The control circuit may also determine a duration of the discharge cycle using results of comparing respective voltage levels of the generated rising and falling ramp signals.
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公开(公告)号：US10763750B1
公开(公告)日：2020-09-01
申请号：US16375847
申请日：2019-04-04
Applicant: Apple Inc.
Inventor： Nikola Jovanovic , Michael Couleur
Abstract: A power converter circuit included in a computer system may charge and discharge a switch node coupled to a regulated power supply node via an inductor. During a discharge cycle, the power converter circuit may sense a current being discharge from the regulated power supply node through the inductor into a ground supply node. The power converter circuit may also sense a noise current flowing in the ground supply node, and generate a control current using both the current being discharge and the noise current. Using the control current, the power converter circuit may halt the discharge cycle.
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公开(公告)号：US20180248481A1
公开(公告)日：2018-08-30
申请号：US15444594
申请日：2017-02-28
Applicant: Apple Inc.
Inventor： Michael Couleur , Fabio Ongaro , Dashun Xue
IPC: H02M3/158
CPC classification number: H02M3/158
Abstract: A regulator circuit that employs coupled inductors with on-time modulation is disclosed. The regulator circuit includes a driver circuit coupled via first and second inductors to a power supply node of a load circuit, and may charge the power supply node via the first inductor for a first charging period, and charge the power supply node via the second inductor for a second charging period. A control circuit may determine durations of the first and second charging periods using respective pluralities of currents.
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公开(公告)号：US12155304B2
公开(公告)日：2024-11-26
申请号：US17931088
申请日：2022-09-09
Applicant: Apple Inc.
Inventor： Michael Couleur , Nicola Rasera , Nikola Jovanovic
IPC: H02M3/158
Abstract: A multi-level power converter circuit for computer systems maintains phase alignment with other power converter circuits by employing low-gain phase-locked loop circuits. In order to account for different voltage levels on its terminal nodes, the power converter circuit may perform a comparison of the respective voltage levels of its terminal nodes. Using results of the comparison, the power converter circuit can select different regulation modes using different ones of the low-gain phase-locked loop circuits.
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公开(公告)号：US20240388206A1
公开(公告)日：2024-11-21
申请号：US18320978
申请日：2023-05-20
Applicant: Apple Inc.
Inventor： Giovanni Saccomanno , Michael Couleur , Bhanupriya Suresh
Abstract: A switching circuit for a single-input multiple-output power converter is disclosed. The switching circuit includes an inductor coupled between an input power supply and a switch node, which is further coupled to a shared capacitor. Multiple switch circuits generate, during different time periods, corresponding boost voltages using the shared capacitor. The boost voltages are used by the multiple switch circuits to couple the switch node to corresponding regulated power supply nodes.
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Patent Agency Ranking
公开(公告)号：US11777398B2
公开(公告)日：2023-10-03
申请号：US17144902
申请日：2021-01-08
Applicant: Apple Inc.
Inventor： Giulio Maria Iadicicco , Michael Couleur , Siarhei Meliukh
IPC: H02M1/08 , H03K17/687 , H02M3/158 , H03K17/06 , H02M1/00
CPC classification number: H02M1/08 , H02M3/158 , H03K17/6872 , H02M1/0006 , H03K17/063
Abstract: Circuitry for bootstrapping and precharging a gate of a field-effect transistor (FET) is disclosed. In one embodiment, an apparatus includes a first transistor coupled to a switching node and further coupled to receive a supply voltage from a supply voltage node, and a second transistor coupled between the switching node and a ground node, wherein the first and second transistors are of a same type. A precharge circuit is configured to precharge a gate terminal of the first transistor to a voltage that is less than a supply voltage on the voltage supply node. The apparatus also includes a bootstrap circuit. Subsequent to precharging the gate terminal of the first transistor, the bootstrap circuit is configured to cause activation of the first transistor by charging the gate terminal to a voltage greater than the supply voltage.
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公开(公告)号：US11552563B2
公开(公告)日：2023-01-10
申请号：US16951678
申请日：2020-11-18
Applicant: Apple Inc.
Inventor： Nikola Jovanovic , Michael Couleur , Siarhei Meliukh
Abstract: A power converter is disclosed. The power converter is configured to provide a regulated output voltage. The power converter includes a first control loop configured to generate a first voltage based on a rate of change of the regulated output voltage. A second control loop is configured to generate a second voltage based on an output current provided by the power converter. An amplifier is configured to generate a third voltage based on the first and second voltages. A control circuit is configured to control the regulated output voltage based on the third voltage.
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28.发明申请公开(公告)号：US20220345040A1
公开(公告)日：2022-10-27
申请号：US17242012
申请日：2021-04-27
Applicant: Apple Inc.
Inventor： Michael Couleur , Nicola Rasera , Nikola Jovanovic , Pietro Gabriele Gambetta
Abstract: A hysteretic current control switching power converter with a clock-controlled switching frequency is disclosed. A power converter includes a switching circuit including a high side switch and a low side switch coupled to one another at a switching node, with an inductor being coupled between the switching node and a regulated supply voltage node. The power converter further includes a control circuit configured to alternately cause activation of the high side switch and the low side switch, wherein the control circuit is configured to activate the low side switch in response to a first voltage reaching peak threshold value, the first voltage corresponding to a current through the inductor. A ramp voltage circuit is configured to, in response to a clock signal, generate a ramp voltage, wherein the peak threshold value is based on the ramp voltage.
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公开(公告)号：US20220224216A1
公开(公告)日：2022-07-14
申请号：US17144902
申请日：2021-01-08
Applicant: Apple Inc.
Inventor： Giulio Maria Iadicicco , Michael Couleur , Siarhei Meliukh
IPC: H02M1/08 , H02M3/158 , H03K17/687
Abstract: Circuitry for bootstrapping and precharging a gate of a field-effect transistor (FET) is disclosed. In one embodiment, an apparatus includes a first transistor coupled to a switching node and further coupled to receive a supply voltage from a supply voltage node, and a second transistor coupled between the switching node and a ground node, wherein the first and second transistors are of a same type. A precharge circuit is configured to precharge a gate terminal of the first transistor to a voltage that is less than a supply voltage on the voltage supply node. The apparatus also includes a bootstrap circuit. Subsequent to precharging the gate terminal of the first transistor, the bootstrap circuit is configured to cause activation of the first transistor by charging the gate terminal to a voltage greater than the supply voltage.
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公开(公告)号：US11171563B2
公开(公告)日：2021-11-09
申请号：US16399290
申请日：2019-04-30
Applicant: Apple Inc.
Inventor： Michael Couleur , Yesim Inam , Dashun Xue
Abstract: A power converter circuit that includes a switch node coupled to a regulated power supply node via an inductor may, during a discharge cycle, sink current from the regulated power supply node. A control circuit may generate the rising and falling ramp signals using voltage levels of an input power supply node and the regulated power supply node. The control circuit may also determine a duration of the discharge cycle using results of comparing respective voltage levels of the generated rising and falling ramp signals.
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