Intelligent system of unified content posting
    21.
    发明授权
    Intelligent system of unified content posting 有权
    统一内容发布智能系统

    公开(公告)号:US08745169B2

    公开(公告)日:2014-06-03

    申请号:US12519756

    申请日:2006-12-30

    CPC classification number: H04L67/26 G06F17/3089 H04L67/2838

    Abstract: A method, apparatus and system is applied to provide a unified content posting mechanism. The method comprises: receiving a single version of content to be posted on one or more remote servers; formatting the received content according to one or more predetermined criteria for posting on the one or more remote servers; posting the formatted content on the one or more remote servers via one or more post services. The method, apparatus and system provide the standardized and simplified process of posting content to the websites.

    Abstract translation: 应用一种方法,装置和系统来提供统一的内容发布机制。 该方法包括:接收要发布在一个或多个远程服务器上的单个版本的内容; 根据用于在一个或多个远程服务器上发布的一个或多个预定标准格式化所接收的内容; 通过一个或多个邮政服务在一个或多个远程服务器上发布格式化的内容。 该方法,设备和系统提供了向网站发布内容的标准化和简化过程。

    Apparatus and method for automatically parallelizing network applications through pipelining transformation
    22.
    发明授权
    Apparatus and method for automatically parallelizing network applications through pipelining transformation 有权
    通过流水线转换自动并行化网络应用的装置和方法

    公开(公告)号:US08438552B2

    公开(公告)日:2013-05-07

    申请号:US12751929

    申请日:2010-03-31

    CPC classification number: G06F8/456

    Abstract: In some embodiments, a method and apparatus for automatically parallelizing a sequential network application through pipeline transformation are described. In one embodiment, the method includes the configuration of a network processor into a D-stage processor pipeline. Once configured, a sequential network application program is transformed into D-pipeline stages. Once transformed, the D-pipeline stages are executed in parallel within the D-stage processor pipeline. In one embodiment, transformation of a sequential application program is performed by modeling the sequential network program as a flow network model and selecting from the flow network model into a plurality of preliminary pipeline stages. Other embodiments are described and claimed.

    Abstract translation: 在一些实施例中,描述了通过流水线变换自动并行化顺序网络应用的方法和装置。 在一个实施例中,该方法包括将网络处理器配置到D级处理器流水线中。 一旦配置,顺序网络应用程序被转换成D流水线阶段。 一旦变换,D级流水线级在D级处理器管线中并行执行。 在一个实施例中,顺序应用程序的转换通过将顺序网络程序建模为流网络模型并从流网络模型选择为多个初级流水线级来执行。 描述和要求保护其他实施例。

    METHOD AND SYSTEM FOR IMPROVING VIDEO SURVEILLANCE
    23.
    发明申请
    METHOD AND SYSTEM FOR IMPROVING VIDEO SURVEILLANCE 审中-公开
    改进视频监控的方法和系统

    公开(公告)号:US20120218408A1

    公开(公告)日:2012-08-30

    申请号:US13503564

    申请日:2009-10-23

    Abstract: The present invention provides a method and system for improving video surveillance. The system comprises a video surveillance platform ViSS and a first server SVAS connected to the video surveillance platform. The video surveillance platform includes also a second server CSM and a gateway CSG. A user side camera captures the user's head motion and a user side DVS sends the captured video to the SVAS via the ViSS. The SVAS processes the video, analyzes the head motion and sends the result of analysis to the CMS, Then, the CMS sends a corresponding instruction to the CSG according to the result of analysis. Next, the CSG translates the received instruction into a PTZ control instruction and sends this PTZ control instruction to an on-site DVS. Finally, the on-site DVS indicates an on-site camera to perform a corresponding action according to the PTZ control instruction.

    Abstract translation: 本发明提供一种改善视频监控的方法和系统。 该系统包括视频监控平台ViSS和连接到视频监控平台的第一台服务器SVAS。 视频监控平台还包括第二个服务器CSM和网关CSG。 用户侧相机拍摄用户的头部动作,用户端DVS通过ViSS将捕获的视频发送到SVAS。 SVAS处理视频,分析头部动作,并将分析结果发送给CMS,然后CMS根据分析结果向CSG发送相应的指令。 接下来,CSG将接收到的指令转换为PTZ控制指令,并将该PTZ控制指令发送到现场DVS。 最后,现场DVS表示现场摄像机根据PTZ控制指令执行相应的动作。

    Sub-diffraction limit image resolution and other imaging techniques
    24.
    发明授权
    Sub-diffraction limit image resolution and other imaging techniques 有权
    次衍射极限图像分辨率等成像技术

    公开(公告)号:US07838302B2

    公开(公告)日:2010-11-23

    申请号:US12012524

    申请日:2008-02-01

    Abstract: The present invention generally relates to sub-diffraction limit image resolution. In one aspect, the invention is directed to determining and/or imaging light from two or more entities separated by a distance less than the diffraction limit of the incident light. In one set of embodiments, the entities may be selectively activatable, i.e., one entity can be activated to produce light, without activating other entities. The emitted light may be used to determine the positions of the first and second entities, for example, using Gaussian fitting or other mathematical techniques, and in some cases, with sub-diffraction limit resolution. The methods may thus be used, for example, to determine the locations of two or more entities immobilized relative to a common entity, for example, a surface, or a biological entity such as DNA, a protein, a cell, a tissue, etc.

    Abstract translation: 本发明一般涉及副衍射极限图像分辨率。 在一个方面,本发明涉及确定和/或成像来自两个或多个实体的光,所述物体被隔开的距离小于入射光的衍射极限。 在一组实施例中,实体可以是可选择性地激活的,即,一个实体可以被激活以产生光,而不激活其他实体。 发射的光可以用于确定第一和第二实体的位置,例如,使用高斯拟合或其他数学技术,并且在一些情况下,具有次衍射极限分辨率。 因此,可以使用这些方法,例如确定相对于共同实体(例如表面)或生物实体(例如DNA,蛋白质,细胞,组织等)固定的两个或多个实体的位置。 。

    Live set transmission in pipelining applications
    25.
    发明授权
    Live set transmission in pipelining applications 有权
    流水线应用中的实时传输

    公开(公告)号:US07581214B2

    公开(公告)日:2009-08-25

    申请号:US10824586

    申请日:2004-04-15

    CPC classification number: G06F8/456

    Abstract: A program may be partitioned into at least two stages, where at least one of the stages comprises more than one parallel thread. Data required by each of the stages, which data is defined in a previous stage may be identified. Transmission of the required data between consecutive stages may then be provided for.

    Abstract translation: 程序可以被划分为至少两个阶段,其中至少一个级包括多于一个的并行线程。 可以识别每个阶段所需的数据,哪些数据在前一阶段中定义。 然后可以提供在连续阶段之间传输所需数据。

    Memory access instruction vectorization
    26.
    发明授权
    Memory access instruction vectorization 有权
    存储器访问指令向量化

    公开(公告)号:US07457936B2

    公开(公告)日:2008-11-25

    申请号:US10718283

    申请日:2003-11-19

    CPC classification number: G06F8/41

    Abstract: A compilation method includes converting memory access instructions that read or write less than a minimum data access unit (MDAU) to memory access instructions that read or write a multiple of the minimum data access unit, converting the memory access instructions into a format including a base address plus an offset, grouping subsets of the converted memory access instructions into partitions, and vectorizing the converted memory access instructions in the subsets that match instruction patterns.

    Abstract translation: 编译方法包括将读取或写入小于最小数据存取单元(MDAU)的存储器访问指令转换成读或写最小数据访问单元的倍数的存储器访问指令,将存储器访问指令转换成包括基底 地址加偏移,将转换的存储器访问指令的子集分组成分区,以及对与指令模式匹配的子集中的转换的存储器访问指令进行向量化。

    System and method for generating object code for map-reduce idioms in multiprocessor systems
    27.
    发明申请
    System and method for generating object code for map-reduce idioms in multiprocessor systems 审中-公开
    用于生成多处理器系统中map-reduce习语的目标代码的系统和方法

    公开(公告)号:US20080127146A1

    公开(公告)日:2008-05-29

    申请号:US11516292

    申请日:2006-09-06

    CPC classification number: G06F8/456

    Abstract: Methods and systems are provided for recognizing and processing reduction operations to optimize generated binary code for execution in a multiprocessor computer system. Reduction operations facilitate data parallelism whereby each processing thread contributes a value and the values are reduced using a function to obtain and return a reduced value to each of the threads. Embodiments of an idiom-based interprocedural compiler provide a unified framework for processing both implicit and explicit reductions. The compiler integrates explicit reductions and implicit reductions by providing a uniform intermediate format. The compiler resolves dependencies among processing threads within program code by checking for privatization of dependent threads or parallelizing reduction idioms within the threads, and generates parallelized object code for execution in a multiprocessor computer.

    Abstract translation: 提供了用于识别和处理缩减操作以优化用于在多处理器计算机系统中执行的生成的二进制代码的方法和系统。 缩减操作有助于数据并行性,从而每个处理线程提供一个值,并且通过使用函数来减小值以减少每个线程的值。 基于习语的过程间编译器的实施例提供了用于处理隐式和显式缩减的统一框架。 编译器通过提供统一的中间格式来集成显式的减少和隐式的减少。 编译器通过检查线程内的依赖线程的私有化或并行化还原成语来解决程序代码内的处理线程之间的依赖关系,并生成用于在多处理器计算机中执行的并行化目标代码。

    Handheld device for elderly people
    28.
    发明申请
    Handheld device for elderly people 审中-公开
    老人手持设备

    公开(公告)号:US20080005301A1

    公开(公告)日:2008-01-03

    申请号:US11478460

    申请日:2006-06-30

    CPC classification number: G06F15/16 H04M1/72541 H04M1/72588

    Abstract: The embodiments of the invention relate to a mobile computing device, such as a cell phone or “handheld” with expanded features and capabilities for elderly persons, children, and others with either health-related issues or the need to monitoring by friends, family members, healthcare personnel, or others. Illustratively, the invention is a middleware application for a handheld/cellular device, that may be remotely configurable, and interacts with network service providers to provide a single-button solution for elderly people requiring assistance and for the notification of multiple parties regarding the nature of the required assistance.

    Abstract translation: 本发明的实施例涉及一种移动计算设备,例如具有扩展的特征和能力的移动计算设备,例如具有与健康有关的问题的老年人,儿童和其他能力的移动计算设备,或需要由朋友,家庭成员 ,保健人员或其他人员。 说明性地,本发明是用于手持/蜂窝设备的中间件应用,其可以是远程可配置的,并且与网络服务提供商交互以为需要协助的老年人提供单按钮解决方案,并且通知多方关于 所需的协助。

    Live set transmission in pipelining applications
    29.
    发明申请
    Live set transmission in pipelining applications 有权
    流水线应用中的实时传输

    公开(公告)号:US20050235276A1

    公开(公告)日:2005-10-20

    申请号:US10824586

    申请日:2004-04-15

    CPC classification number: G06F8/456

    Abstract: A program may be partitioned into at least two stages, where at least one of the stages comprises more than one parallel thread. Data required by each of the stages, which data is defined in a previous stage may be identified. Transmission of the required data between consecutive stages may then be provided for.

    Abstract translation: 程序可以被划分为至少两个阶段,其中至少一个级包括多于一个的并行线程。 可以识别每个阶段所需的数据,哪些数据在前一阶段中定义。 然后可以提供在连续阶段之间传输所需数据。

    Memory access instruction vectorization
    30.
    发明申请
    Memory access instruction vectorization 有权
    存储器访问指令向量化

    公开(公告)号:US20050108499A1

    公开(公告)日:2005-05-19

    申请号:US10718283

    申请日:2003-11-19

    CPC classification number: G06F8/41

    Abstract: A compilation method includes converting memory access instructions that read or write less than a minimum data access unit (MDAU) to memory access instructions that read or write a multiple of the minimum data access unit, converting the memory access instructions into a format including a base address plus an offset, grouping subsets of the converted memory access instructions into partitions, and vectorizing the converted memory access instructions in the subsets that match instruction patterns.

    Abstract translation: 编译方法包括将读取或写入小于最小数据存取单元(MDAU)的存储器访问指令转换成读或写最小数据访问单元的倍数的存储器访问指令,将存储器访问指令转换成包括基底 地址加偏移,将转换的存储器访问指令的子集分组成分区,以及对与指令模式匹配的子集中的转换的存储器访问指令进行向量化。

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