USING A PIXEL OFFSET FOR EVALUATING A PLANE EQUATION
    21.
    发明申请
    USING A PIXEL OFFSET FOR EVALUATING A PLANE EQUATION 有权
    使用像素偏移来评估平面公式

    公开(公告)号:US20110081100A1

    公开(公告)日:2011-04-07

    申请号:US12898537

    申请日:2010-10-05

    IPC分类号: G06K9/32

    CPC分类号: G06T3/4007

    摘要: One embodiment of the present invention sets forth a technique controlling the pixel location at which the plane equation is evaluated. Multiple pixel offsets (dx, dy) may be specified that each define to a sub-pixel sample position. Attributes are then calculated for each sub-pixel sample position that is covered by a geometric primitive. One advantage of the technique is that anti-aliasing quality may be improved since high frequency color components may be selectively supersampled for particular geometric primitives.

    摘要翻译: 本发明的一个实施例提出了一种控制平面方程被评估的像素位置的技术。 可以指定多个像素偏移(dx,dy),每个像素偏移定义为子像素采样位置。 然后对由几何图元覆盖的每个子像素样本位置计算属性。 该技术的一个优点是可以改善抗混叠质量,因为可以对特定几何基元选择性地超采样高频彩色分量。

    Credit-based streaming multiprocessor warp scheduling
    22.
    发明授权
    Credit-based streaming multiprocessor warp scheduling 有权
    基于信用流的多处理器扭曲调度

    公开(公告)号:US09189242B2

    公开(公告)日:2015-11-17

    申请号:US12885299

    申请日:2010-09-17

    IPC分类号: G06F9/50 G06F9/38

    摘要: One embodiment of the present invention sets forth a technique for ensuring cache access instructions are scheduled for execution in a multi-threaded system to improve cache locality and system performance. A credit-based technique may be used to control instruction by instruction scheduling for each warp in a group so that the group of warps is processed uniformly. A credit is computed for each warp and the credit contributes to a weight for each warp. The weight is used to select instructions for the warps that are issued for execution.

    摘要翻译: 本发明的一个实施例提出了一种用于确保高速缓存访​​问指令被调度用于在多线程系统中执行以提高高速缓存位置和系统性能的技术。 可以使用基于信用的技术来对组中的每个翘曲的指令调度来控制指令,使得一组经线被均匀地处理。 对每个经纱计算信用额度,并且信用额度有助于每个经线的权重。 权重用于选择要执行的经纱的说明。

    Multipurpose arithmetic functional unit
    23.
    发明授权
    Multipurpose arithmetic functional unit 有权
    多功能算术功能单元

    公开(公告)号:US07640285B1

    公开(公告)日:2009-12-29

    申请号:US10970101

    申请日:2004-10-20

    IPC分类号: G06F7/38 G06G1/02

    CPC分类号: G06F7/57 G06F2207/3884

    摘要: Multipurpose arithmetic functional units can perform planar attribute interpolation and unary function approximation operations. In one embodiment, planar interpolation operations for coordinates (x, y) are executed by computing A*x+B*y+C, and unary function approximation operations for operand x are executed by computing F2(xb)*xh2+F1(xb)*xh+F0(xb), where xh=x−xb. Shared multiplier and adder circuits are advantageously used to implement the product and sum operations for both classes of operations.

    摘要翻译: 多用途算术功能单元可以执行平面属性插值和一元函数近似运算。 在一个实施例中,通过计算A * x + B * y + C来执行坐标(x,y)的平面内插操作,并且通过计算F2(xb)* xh2 + F1(xb)来执行操作数x的一元函数近似运算 )* xh + F0(xb),其中xh = x-xb。 共享乘法器和加法器电路有利地用于实现两类操作的乘积和求和运算。

    Multipurpose functional unit with multiply-add and format conversion pipeline
    24.
    发明授权
    Multipurpose functional unit with multiply-add and format conversion pipeline 有权
    具有多重加法和格式转换管道的多用途功能单元

    公开(公告)号:US07428566B2

    公开(公告)日:2008-09-23

    申请号:US10985674

    申请日:2004-11-10

    IPC分类号: G06F7/38

    CPC分类号: G06F9/30014 G06F9/3885

    摘要: A multipurpose functional unit is configurable to support a number of operations including multiply-add and format conversion operations, as well as other integer and/or floating-point arithmetic operations, Boolean operations, and logical test operations.

    摘要翻译: 多用途功能单元可配置为支持多种操作,包括乘法加法和格式转换操作,以及其他整数和/或浮点算术运算,布尔运算和逻辑运算。

    High-speed function approximation
    25.
    发明授权
    High-speed function approximation 有权
    高速函数近似

    公开(公告)号:US07366745B1

    公开(公告)日:2008-04-29

    申请号:US10861184

    申请日:2004-06-03

    IPC分类号: G06F1/02

    CPC分类号: G06F7/544

    摘要: Methods and apparatuses are presented for determining coefficients for a polynomial-based approximation of a function, by iteratively estimating a first coefficient, reducing the first coefficient to a lower precision to obtain a first limited-precision coefficient, analytically calculating a second coefficient by taking into account the first limited-precision coefficient, reducing the second coefficient to a lower precision to obtain a second limited-precision coefficient, iteratively estimating a third coefficient by taking into account at least one of the first limited-precision coefficient and the second limited-precision coefficient, and reducing the third coefficient to a lower precision to obtain a third limited-precision coefficient. In one embodiment of the invention, the polynomial-based approximation relates to a minimax approximation of the function approximated, and at least one of the steps for iteratively estimating the first coefficient and iteratively estimating the third coefficient involves use of a Remez exchange algorithm.

    摘要翻译: 提出方法和装置,用于通过迭代地估计第一系数来确定函数的基于多项式的近似的系数,将第一系数降低到较低的精度以获得第一有限精度系数,通过考虑计算第二系数来分析计算第二系数 考虑到第一有限精度系数,将第二系数降低到较低精度以获得第二有限精度系数,通过考虑第一有限精度系数和第二限制精度系数中的至少一个来迭代地估计第三系数 系数,并将第三系数降低到较低的精度,以获得第三有限精度系数。 在本发明的一个实施例中,基于多项式的近似涉及逼近的函数的最小近似,并且用于迭代地估计第一系数并迭代地估计第三系数的步骤中的至少一个涉及使用Remez交换算法。

    Credit-Based Streaming Multiprocessor Warp Scheduling
    26.
    发明申请
    Credit-Based Streaming Multiprocessor Warp Scheduling 有权
    基于信用流的多处理器整流器调度

    公开(公告)号:US20110072244A1

    公开(公告)日:2011-03-24

    申请号:US12885299

    申请日:2010-09-17

    IPC分类号: G06F9/38 G06F9/312

    摘要: One embodiment of the present invention sets forth a technique for ensuring cache access instructions are scheduled for execution in a multi-threaded system to improve cache locality and system performance. A credit-based technique may be used to control instruction by instruction scheduling for each warp in a group so that the group of warps is processed uniformly. A credit is computed for each warp and the credit contributes to a weight for each warp. The weight is used to select instructions for the warps that are issued for execution.

    摘要翻译: 本发明的一个实施例提出了一种用于确保高速缓存访​​问指令被调度用于在多线程系统中执行以提高高速缓存位置和系统性能的技术。 可以使用基于信用的技术来对组中的每个翘曲的指令调度来控制指令,使得一组经线被均匀地处理。 对每个经纱计算信用额度,并且信用额度有助于每个经线的权重。 权重用于选择要执行的经线的指令。

    Executing an SIMD instruction requiring P operations on an execution unit that performs Q operations at a time (Q<P)
    27.
    发明授权
    Executing an SIMD instruction requiring P operations on an execution unit that performs Q operations at a time (Q 有权
    执行一次执行Q操作的执行单元上的P操作的SIMD指令(Q

    公开(公告)号:US07484076B1

    公开(公告)日:2009-01-27

    申请号:US11532853

    申请日:2006-09-18

    IPC分类号: G06F15/80

    摘要: Methods, apparatuses, and systems are presented for performing instructions using multiple execution units in a graphics processing unit involving issuing an instruction for P executions of the instruction wherein each execution uses different data, P being a positive integer, the instruction being issued based on a first clock having a first clock rate, operating Q execution units to achieve the P executions of the instruction, Q being a positive integer less than P and greater than one, each of the execution units being operated based on a second clock having a second clock rate higher than the first clock rate of the first clock, and wherein the second clock rate of the second clock is equal to the first clock rate of the first clock multiplied by the ratio P/Q.

    摘要翻译: 呈现用于在图形处理单元中执行使用多个执行单元的指令的方法,装置和系统,该图形处理单元涉及发出指令的P执行指令,其中每个执行使用不同的数据,P是正整数,基于 第一时钟具有第一时钟速率,操作Q执行单元以实现指令的P执行,Q是小于P且大于1的正整数,每个执行单元基于具有第二时钟的第二时钟来操作 速率高于第一时钟的第一时钟速率,并且其中第二时钟的第二时钟速率等于第一时钟的第一时钟速率乘以比率P / Q。

    Dynamic load balancing of instructions for execution by heterogeneous processing engines
    30.
    发明授权
    Dynamic load balancing of instructions for execution by heterogeneous processing engines 有权
    用于异构处理引擎执行的指令的动态负载平衡

    公开(公告)号:US08578387B1

    公开(公告)日:2013-11-05

    申请号:US11831873

    申请日:2007-07-31

    IPC分类号: G06F9/46

    摘要: An embodiment of a computing system is configured to process data using a multithreaded SIMD architecture that includes heterogeneous processing engines to execute a program. The program is constructed of various program instructions. A first type of the program instructions can only be executed by a first type of processing engine and a third type of program instructions can only be executed by a second type of processing engine. A second type of program instructions can be executed by the first and the second type of processing engines. An assignment unit may be configured to dynamically determine which of the two processing engines executes any program instructions of the second type in order to balance the workload between the heterogeneous processing engines.

    摘要翻译: 计算系统的实施例被配置为使用包括异构处理引擎来执行程序的多线程SIMD架构来处理数据。 该程序由各种程序指令构成。 第一类型的程序指令只能由第一类型的处理引擎执行,并且第三类型的程序指令只能由第二类型的处理引擎执行。 第二类型的程序指令可以由第一类和第二类处理引擎执行。 分配单元可以被配置为动态地确定两个处理引擎中的哪一个执行第二类型的任何程序指令,以便平衡异构处理引擎之间的工作负载。