公开(公告)号：US5281854A

公开(公告)日：1994-01-25

申请号：US977194

申请日：1992-11-16

申请人： George Wong

发明人： George Wong

IPC分类号： H01L21/321 ,  H01L21/768 ,  H01L23/48

CPC分类号： H01L21/76877 ,  H01L21/321 ,  H01L2924/0002

摘要： A structure formed by the method of forming a highly conductive electrical contact to a semiconductor region of an integrated circuits device is described. An opening to the semiconductor region is provided through an insulating layer. A thin first layer of aluminium having a first grain size is sputter deposited over and in the opening covering the surface of the semiconductor region. A second layer of aluminium having a second and substantially different grain size from the thin first layer of aluminium is sputter deposited thereover. The resulting aluminum structure is subjected in its normal process of manufacture to temperature cycling of greater than about 300.degree. C. whereby any formed silicon nodules are preferentially formed at the boundary of the thin first layer of aluminium and the second layer of aluminium. The second layer of aluminium may in one alternative completely fill the opening. In another alternative, a third layer has substantially the same grain size as the first aluminum. In this last alternative, the third layer will fill the opening to complete the electrical contact. The grain size is adjusted by the bias applied or not applied during the sputter deposition.

摘要翻译： 描述了通过形成与集成电路器件的半导体区域的高导电性电接触的方法形成的结构。 通过绝缘层设置到半导体区域的开口。 具有第一晶粒尺寸的薄的第一第一层铝被溅射沉积在覆盖半导体区域的表面的开口中。 在其上溅射沉积具有与薄的第一层铝第二且基本不同的晶粒尺寸的第二层铝。 所得到的铝结构在其正常的制造过程中经历大于约300℃的温度循环，由此在薄的第一层铝和第二层的边界处优先形成任何形成的硅结节。 第二层铝可以在一个替代方案中完全填充开口。 在另一替代方案中，第三层具有与第一铝基本上相同的晶粒尺寸。 在最后一个替代方案中，第三层将填充开口以完成电气接触。 通过在溅射沉积期间施加的或不施加的偏压来调整晶粒尺寸。

公开(公告)号：US5175125A

公开(公告)日：1992-12-29

申请号：US680156

申请日：1991-04-03

申请人： George Wong

发明人： George Wong

IPC分类号： H01L21/321 ,  H01L21/768

CPC分类号： H01L21/76877 ,  H01L21/321 ,  H01L2924/0002

摘要： The method of forming a highly conductive electrical contact to a semiconductor region of an integrated circuits device is described. An opening to the semiconductor region is provided through an insulating layer. A thin first layer of aluminium having a first grain size is sputter deposited over and in the opening covering the surface of the semiconductor region. A second layer of aluminium having a second and substantially different grain size from the thin first layer of aluminium is sputter deposited thereover. The resulting aluminum structure is subjected in its normal process of manufacture to temperature cycling of greater than about 300.degree. C. whereby any formed silicon nodules are preferentially formed at the boundary of the thin first layer of aluminium and the second layer of aluminium. The second layer of aluminium may in one alternative completely fill the opening. In another alternative, a third layer having substantially the same grain size as the first aluminum. In this last alternative, the third layer will fill the opening to complete the electrical contact. The grain size is adjusted by the bias applied or not applied during the sputter deposition.

摘要翻译： 描述了形成集成电路器件的半导体区域的高导电性电接触的方法。 通过绝缘层设置到半导体区域的开口。 具有第一晶粒尺寸的薄的第一第一层铝被溅射沉积在覆盖半导体区域的表面的开口中。 在其上溅射沉积具有与薄的第一层铝第二且基本不同的晶粒尺寸的第二层铝。 所得到的铝结构在正常制造过程中经历大于约300℃的温度循环，由此在薄的第一层铝和第二层铝的边界处优先形成任何形成的硅结节。 第二层铝可以在一个替代方案中完全填充开口。 在另一替代方案中，具有与第一铝基本相同的晶粒尺寸的第三层。 在最后一个替代方案中，第三层将填充开口以完成电气接触。 通过在溅射沉积期间施加的或不施加的偏压来调整晶粒尺寸。

公开(公告)号：US4772966A

公开(公告)日：1988-09-20

申请号：US657948

申请日：1984-10-05

申请人： Thomas D. Sharples ,  Michael L. Collette ,  Kelly Quan ,  George Wong

发明人： Thomas D. Sharples ,  Michael L. Collette ,  Kelly Quan ,  George Wong

IPC分类号： G11B15/18 ,  G11B15/467 ,  G11B27/00 ,  G11B27/024 ,  G11B27/028 ,  G11B27/10 ,  G11B27/32 ,  G11B27/34 ,  G11B27/36 ,  H04N9/797 ,  G11B ,  G11B15/46

CPC分类号： H04N9/7976 ,  G11B15/1808 ,  G11B15/4675 ,  G11B27/002 ,  G11B27/028 ,  G11B27/10 ,  G11B27/323 ,  G11B27/34 ,  G11B27/36 ,  G11B2220/90 ,  G11B27/024

摘要： A synchronizer for synchronizing a slave tape recorder to a master tape recorder. When the speed of the master recorder exceeds 2.5 times the nominal play speed, the synchronizer causes the slave recorder to lag behind the master recorder by an amount related to the speed of the slave recorder. At lower speeds, the synchronizer causes the slave recorder to lock onto the position and speed of the master recorder. The synchronizer employs time-code readers to read time-code on address tracks on the master and slave recorders. The time-code readers produce not only time-code but also clock pulses which are employed to determine the speed of master and slave with high resolution. Both the time-code readers and a resolver employed in the synchronizer are constructed from gate assemblies rather than processors to reduce execution times for the processor in the synchronizer. The resolver is a digital resolver which includes a phase comparator which produces pulses having a width related to the phase difference between indications of the synchronization word in the time-code and polarity to indicate whether the master leads or lags the slave. This signal is applied to a counter which generates a digital error signal based on the phase difference which is employed to control the speed of the slave recorder.

摘要翻译： 用于将从属磁带录音机同步到主磁带录音机的同步器。 当主记录仪的速度超过标称播放速度的2.5倍时，同步器会使从属录像机落后于主记录仪，与从机速度相关。 在较低的速度下，同步器使从机记录器锁定到主记录仪的位置和速度。 同步器采用时间码读取器来读取主和从记录器上的地址轨道上的时间码。 时间码读取器不仅产生时间码，而且产生用于确定具有高分辨率的主机和从机速度的时钟脉冲。 同步器中使用的时间码读取器和解析器都是由门组件而不是处理器构成的，以减少同步器中处理器的执行时间。 解算器是数字解析器，其包括相位比较器，其产生具有与时间码中的同步字的指示之间的相位差相关的宽度的脉冲和极性，以指示主器件是引线还是滞后从器件。 该信号被施加到计数器，该计数器基于用于控制从记录器的速度的相位差产生数字误差信号。