公开(公告)号：USRE43426E1

公开(公告)日：2012-05-29

申请号：US13152124

申请日：2011-06-02

申请人： Tse-Liang Ying ,  Shi-Ming Chen

发明人： Tse-Liang Ying ,  Shi-Ming Chen

IPC分类号： H01L21/00

CPC分类号： H01L33/42 ,  Y10S438/956

摘要： A method for forming a transparent electrode on a visible light-emitting diode is described. A visible light-emitting diode element is provided, and the visible light-emitting diode element has a substrate, an epitaxial structure and a metal electrode. The metal electrode and the epitaxial structure are located on the same side of the substrate, or located respectively on the different sides of the substrate. An ohmic metal layer is formed on a surface of the epitaxial structure. The ohmic metal layer is annealed. The ohmic metal layer is removed to expose the surface of the epitaxial structure. A transparent electrode layer is formed on the exposed surface. A metal pad is formed on the transparent electrode layer.

摘要翻译： 描述了在可见光发光二极管上形成透明电极的方法。 提供了可见光发光二极管元件，可见光发光二极管元件具有基板，外延结构和金属电极。 金属电极和外延结构位于基板的同一侧，或分别位于基板的不同侧。 在外延结构的表面上形成欧姆金属层。 欧姆金属层退火。 去除欧姆金属层以露出外延结构的表面。 在露出的表面上形成透明电极层。 在透明电极层上形成金属焊盘。

公开(公告)号：US20070065959A1

公开(公告)日：2007-03-22

申请号：US11273382

申请日：2005-11-12

申请人： Yu-Ju Chang ,  Jui-Hsiang Yen ,  Chi-Meng Lu ,  Tse-Liang Ying

发明人： Yu-Ju Chang ,  Jui-Hsiang Yen ,  Chi-Meng Lu ,  Tse-Liang Ying

IPC分类号： H01L21/00

CPC分类号： H01L33/02 ,  H01L33/20 ,  H01L33/42

摘要： A method for manufacturing a light-emitting diode is described, comprising the following steps. A substrate is provided. An illuminant epitaxial structure is formed on the substrate, wherein the illuminant epitaxial structure comprises a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer stacked on the substrate in sequence, a surface of the second conductivity type semiconductor layer includes at least one epitaxial defect formed therein, and the first conductivity type semiconductor layer and the second conductivity type semiconductor layer are opposite conductivity types. Then, an insulation layer is formed to fill into the epitaxial defect in the second conductivity type semiconductor layer. A transparent electrode layer is formed on the surface of the second conductivity type semiconductor layer.

摘要翻译： 描述了一种用于制造发光二极管的方法，包括以下步骤。 提供基板。 在基板上形成发光体外延结构，其中，所述发光体外延结构依次包括在所述基板上堆叠的第一导电型半导体层，有源层和第二导电型半导体层，所述第二导电型半导体层的表面包括 其中形成有至少一个外延缺陷，并且第一导电类型半导体层和第二导电类型半导体层是相反的导电类型。 然后，形成绝缘层以填充第二导电类型半导体层中的外延缺陷。 在第二导电型半导体层的表面上形成透明电极层。

公开(公告)号：US07192794B2

公开(公告)日：2007-03-20

申请号：US10938309

申请日：2004-09-09

申请人： Tse-Liang Ying ,  Shi-Ming Chen

发明人： Tse-Liang Ying ,  Shi-Ming Chen

IPC分类号： H01L21/00

CPC分类号： H01L33/42 ,  Y10S438/956

摘要： A method for forming a transparent electrode on a visible light-emitting diode is described. A visible light-emitting diode element is provided, and the visible light-emitting diode element has a substrate, an epitaxial structure and a metal electrode. The metal electrode and the epitaxial structure are located on the same side of the substrate, or located respectively on the different sides of the substrate. An ohmic metal layer is formed on a surface of the epitaxial structure. The ohmic metal layer is annealed. The ohmic metal layer is removed to expose the surface of the epitaxial structure. A transparent electrode layer is formed on the exposed surface. A metal pad is formed on the transparent electrode layer.

摘要翻译： 描述了在可见光发光二极管上形成透明电极的方法。 提供了可见光发光二极管元件，可见光发光二极管元件具有基板，外延结构和金属电极。 金属电极和外延结构位于基板的同一侧，或分别位于基板的不同侧。 在外延结构的表面上形成欧姆金属层。 欧姆金属层退火。 去除欧姆金属层以露出外延结构的表面。 在露出的表面上形成透明电极层。 在透明电极层上形成金属焊盘。

公开(公告)号：US06207492B1

公开(公告)日：2001-03-27

申请号：US09587466

申请日：2000-06-05

申请人： Kuo-Chyuan Tzeng ,  Tse-Liang Ying ,  Chen-Jong Wang ,  Kevin Chiang

发明人： Kuo-Chyuan Tzeng ,  Tse-Liang Ying ,  Chen-Jong Wang ,  Kevin Chiang

IPC分类号： H01L218242

CPC分类号： H01L27/10894 ,  H01L27/10873

摘要： A process for forming logic devices with salicide shapes on gate structures, as well as on heavily doped source/drain regions, while simultaneously forming embedded DRAM devices with salicide shapes only on gate structures, has been developed. The process features silicon oxide blocking shapes, formed in the spaces between gate structures, in the embedded DRAM device region. The silicon oxide blocking shapes are formed using a high density plasma deposition procedure which deposits a thick silicon oxide layer in the narrow spaces between gate structures in the embedded DRAM device region, and a thin silicon oxide layer in the wider spaces between gate structures in the logic device region, and on the top surface of all gate structures. A blanket, dry etch procedure is then employed to remove the thin silicon oxide layers from the top surface of all gate structures, as well as from the spaces between gate structures in the logic device region, while forming the desired silicon oxide blocking shapes between gate structures in the embedded DRAM device region, therefore allowing subsequent salicide shapes to be formed only on the top surface of gate structures, and on heavily doped source/drain regions in the logic device region.

摘要翻译： 已经开发了用于在栅极结构上以及重掺杂的源极/漏极区域上形成具有硅化物形状的逻辑器件的过程，同时仅在栅极结构上形成具有硅化物形状的嵌入式DRAM器件。 该工艺在嵌入式DRAM器件区域中具有形成在栅极结构之间的空间中的氧化硅阻挡形状。 使用高密度等离子体沉积方法形成氧化硅阻挡形状，该方法在嵌入式DRAM器件区域中的栅极结构之间的狭窄空间中沉积厚的氧化硅层，并且在栅极结构中的较宽空间中沉积薄的氧化硅层 逻辑器件区域，并在所有栅极结构的顶表面上。 然后采用全面的干蚀刻方法从所有栅极结构的顶表面以及逻辑器件区域中的栅极结构之间的空间中移除薄氧化硅层，同时在栅极之间形成期望的氧化硅阻挡形状 结构，因此允许仅在栅极结构的顶表面上以及在逻辑器件区域中的重掺杂的源/漏区上形成随后的自对准硅化物形状。

公开(公告)号：US6162686A

公开(公告)日：2000-12-19

申请号：US156362

申请日：1998-09-18

申请人： Kuo Ching Huang ,  Tse-Liang Ying ,  Yu-Hua Lee ,  Ming-Hsin Li

发明人： Kuo Ching Huang ,  Tse-Liang Ying ,  Yu-Hua Lee ,  Ming-Hsin Li

IPC分类号： H01L23/525 ,  H01L21/336 ,  H01L21/00 ,  H01L21/331 ,  H01L21/44 ,  H01L21/82

CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a grooved fuse (plug fuse) in the same step that via plugs are formed in the guard ring area 14 and in product device areas. A key point of the invention is to form fuses from the via plug layer, not from the metal layers. Also, key guard rings are formed around the plug guise. The invention can include the following: a semiconductor structure is provided having a fuse area, a guard ring area surrounding the fuse area; and a device area. First and second conductive strips are formed. First and second insulating layers are formed over the first and second conductive strips. Plug contacts and fuse plugs are formed through the first and second insulating layers to the first and second conductive strips. A third insulating layer is formed over the second insulating layer. Metal lines are formed over the third insulating layer in the device area. A fuse via opening is formed in the third insulating layer. A plug fuse is formed in the fuse via opening. A fourth insulating layer is formed over the plug fuse and the third insulating layer. A fuse opening is formed at least partially though the fourth insulating layer over the fuse area.

摘要翻译： 在通过塞子形成在保护环区域14和产品装置区域中的相同步骤中形成带槽保险丝（插头保险丝）的方法。 本发明的一个关键点是从通孔塞层而不是金属层形成保险丝。 此外，围绕插头形状形成关键保护环。 本发明可以包括：提供具有保险丝区域的半导体结构，围绕保险丝区域的保护环区域; 和设备区域。 形成第一和第二导电条。 第一和第二绝缘层形成在第一和第二导电条上。 插头触点和熔丝插头通过第一和第二绝缘层形成到第一和第二导电条。 在第二绝缘层上形成第三绝缘层。 金属线形成在器件区域中的第三绝缘层上。 在第三绝缘层中形成保险丝通孔。 保险丝通过开口形成插头保险丝。 在插头熔断器和第三绝缘层上形成第四绝缘层。 保险丝开口至少部分地通过保险丝区域上的第四绝缘层形成。

公开(公告)号：US07541205B2

公开(公告)日：2009-06-02

申请号：US11684540

申请日：2007-03-09

申请人： Tse-Liang Ying ,  Shi-Ming Chen

发明人： Tse-Liang Ying ,  Shi-Ming Chen

IPC分类号： H01L21/00

CPC分类号： H01L33/42 ,  Y10S438/956

摘要： A method for forming a transparent electrode on a visible light-emitting diode is described. A visible light-emitting diode element is provided, and the visible light-emitting diode element has a substrate, an epitaxial structure and a metal electrode. The metal electrode and the epitaxial structure are located on the same side of the substrate, or located respectively on the different sides of the substrate. An ohmic metal layer is formed on a surface of the epitaxial structure. The ohmic metal layer is annealed. The ohmic metal layer is removed to expose the surface of the epitaxial structure. A transparent electrode layer is formed on the exposed surface. A metal pad is formed on the transparent electrode layer.

摘要翻译： 描述了在可见光发光二极管上形成透明电极的方法。 提供了可见光发光二极管元件，可见光发光二极管元件具有基板，外延结构和金属电极。 金属电极和外延结构位于基板的同一侧，或分别位于基板的不同侧。 在外延结构的表面上形成欧姆金属层。 欧姆金属层退火。 去除欧姆金属层以露出外延结构的表面。 在露出的表面上形成透明电极层。 在透明电极层上形成金属焊盘。

公开(公告)号：US20060035398A1

公开(公告)日：2006-02-16

申请号：US10938309

申请日：2004-09-09

申请人： Tse-Liang Ying ,  Shi-Ming Chen

发明人： Tse-Liang Ying ,  Shi-Ming Chen

IPC分类号： H01L21/00

CPC分类号： H01L33/42 ,  Y10S438/956

摘要： A method for forming a transparent electrode on a visible light-emitting diode is described. A visible light-emitting diode element is provided, and the visible light-emitting diode element has a substrate, an epitaxial structure and a metal electrode. The metal electrode and the epitaxial structure are located on the same side of the substrate, or located respectively on the different sides of the substrate. An ohmic metal layer is formed on a surface of the epitaxial structure. The ohmic metal layer is annealed. The ohmic metal layer is removed to expose the surface of the epitaxial structure. A transparent electrode layer is formed on the exposed surface. A metal pad is formed on the transparent electrode layer.

公开(公告)号：US6093619A

公开(公告)日：2000-07-25

申请号：US99809

申请日：1998-06-18

申请人： Kuo Ching Huang ,  Tse-Liang Ying ,  Chia-Shiung Tsai

发明人： Kuo Ching Huang ,  Tse-Liang Ying ,  Chia-Shiung Tsai

IPC分类号： H01L21/762 ,  H01L21/768 ,  H01L21/76

CPC分类号： H01L21/76224 ,  H01L21/76895

摘要： A new method of forming a buried contact junction in a process involving shallow trench isolation is described. A first silicon oxide layer is deposited over a pad oxide layer on the surface of a semiconductor substrate. An opening is etched in the first silicon nitride and pad oxide layers where they are not covered by a mask. The substrate underlying the opening is etched into to form a shallow trench. An oxide material is deposited over the surface of the first silicon nitride layer and within the shallow trench and planarized to the surface of the first silicon nitride layer wherein the oxide material forms a STI region. The first silicon nitride layer is removed whereby the STI protrudes above the pad oxide layer. The pad oxide layer is removed whereby the corners of the STI above the substrate are also removed. A second silicon nitride layer is deposited overlying a sacrificial oxide layer and etched away to leave silicon nitride spacers filling in and rounding the corners of the STI. The sacrificial oxide layer is removed. A gate electrode and source/drain regions are formed in and on the substrate wherein a source/drain is adjacent to the STI. The gate electrode and STI are covered with an insulating layer. An opening is etched through the insulating layer to the source/drain region wherein the silicon nitride spacer at the corner of the STI prevents etching of the STI. The opening is filled with a conducting layer to complete formation of a contact.

摘要翻译： 描述了在涉及浅沟槽隔离的过程中形成掩埋接触结的新方法。 在半导体衬底的表面上的衬垫氧化物层上沉积第一氧化硅层。 在第一氮化硅和衬垫氧化物层中蚀刻开口，其中它们不被掩模覆盖。 蚀刻开口下方的基板以形成浅沟槽。 氧化物材料沉积在第一氮化硅层的表面上并在浅沟槽内，并且平坦化到第一氮化硅层的表面，其中氧化物材料形成STI区域。 去除第一氮化硅层，由此STI突出到衬垫氧化物层的上方。 移除衬垫氧化物层，从而也去除衬底上方的STI的拐角。 将第二氮化硅层沉积在牺牲氧化物层上并被蚀刻掉以留下氮化硅间隔物填充到STI的角部并使其四周。 去除牺牲氧化物层。 栅极电极和源极/漏极区域形成在衬底中和衬底上，其中源极/漏极与STI相邻。 栅电极和STI被绝缘层覆盖。 通过绝缘层蚀刻开口到源极/漏极区域，其中STI的拐角处的氮化硅间隔物防止STI的蚀刻。 开口填充有导电层以完成接触的形成。