Abstract:
A metal-insulator-metal capacitor formed in a multilevel semiconductor device utilizes the copper interconnect levels of the semiconductor device as parts of the capacitor. A lower capacitor plate consists of a copper interconnect level and a first metal layer formed on the copper interconnect level by selective deposition methods. The upper capacitor plate includes the same pattern as the capacitor dielectric, the pattern having an area less than the area of the lower capacitor plate. The upper capacitor plate is formed of a second metal layer. The first and second metal layers may each be formed of cobalt, tungsten, nickel, molybdenum, or a combinations of one of the aforementioned elements with boron and/or phosphorus. Conductive vias provide contact from the upper capacitor plate and lower capacitor plate, to interconnect levels.
Abstract:
A compact lens system includes a first positive lens element (1) on the object side and a second negative lens element (2) on the image side. The first positive lens element is a meniscus lens having a convex surface (11) facing the object side. The second negative lens element is also a meniscus lens having a convex surface (12) facing the image side. Both of the first and second lens elements are aspheric lenses each having at least one aspheric surface. The first and second lens elements are made of different plastic materials and are symmetrically arranged with respect to each other along the optical axis.
Abstract:
A compact lens system includes a first positive lens element (1) on the object side and a second negative lens element (2) on the image side. The first positive lens element is a meniscus lens having a convex surface (11) facing the object side. The second negative lens element is also a meniscus lens having a convex surface (12) facing the image side. Both of the first and second lens elements are aspheric lenses each having at least one aspheric surface. The first and second lens elements are made of different plastic materials and are symmetrically arranged with respect to each other along the optical axis.
Abstract:
A capacitor device selectively combines MOM, MIM and varactor regions in the same layout area of an IC. Two or more types of capacitor regions arranged vertically on a substrate to form the capacitor device. This increase the capacitance per unit of the capacitor device, without occupying an extra layout area.