公开(公告)号：US5872728A

公开(公告)日：1999-02-16

申请号：US831271

申请日：1997-03-31

申请人： Gerard Richter

发明人： Gerard Richter

IPC分类号： H04B3/23 ,  G06F17/10

CPC分类号： H04B3/23 ,  H03H2021/0078

摘要： A process for computing the coefficients C(i) of an adaptive filter (206) used in an echo-cancellation structure for a telecommunication apparatus. The process is based on the Least Mean Squared (L.M.S.) or gradient algorithm for computing the coefficients of the filter in accordance with the formula: ##EQU1## where e(i) is the estimation error and .alpha. is the step size used for performing an adjustement of the convergence of the filtering process. The process uses two different estimations of the power of the analog signal, a former short-term estimation and a latter long-term estimation in order to derive the appropriate value of the stepsize .alpha. which is used for computing the new coefficients. In the preferred embodiment the value of .alpha. is determined by dividing a constant .alpha..sub.0 being slightly lower than the maximum value ensuring stability of the convergence process by the greater of the two different estimations of the power of the analog signals.

摘要翻译： 一种用于计算在电信设备的回声消除结构中使用的自适应滤波器（206）的系数C（i）的过程。 该过程基于用于根据以下公式计算滤波器的系数的最小均方（LMS）或梯度算法：其中e（i）是估计误差，α是用于执行滤波器的步长 调整过滤过程的收敛。 该过程使用模拟信号的功率的两个不同估计，前一个短期估计和后一个长期估计，以便导出用于计算新系数的步长α的适当值。 在优选实施例中，α的值通过将常数α0略微低于最大值来确定，以确保收敛过程的稳定性通过模拟信号的功率的两种不同估计中的较大者。

公开(公告)号：US5329553A

公开(公告)日：1994-07-12

申请号：US878128

申请日：1992-05-04

申请人： Jean-Claude Abbiate ,  Alain Blanc ,  Patrick Jeanniot ,  Gerard Richter

发明人： Jean-Claude Abbiate ,  Alain Blanc ,  Patrick Jeanniot ,  Gerard Richter

IPC分类号： H04B14/06 ,  H03H17/06 ,  H04L7/06

CPC分类号： H03H17/0614 ,  H03H17/0664

摘要： A decimation filter for converting a received train of sigma-delta pulses in synchronism with a sigma-delta clock (fs) into a train of Pulse Code Modulation (PCM) samples having a PCM clock in accordance with the formula ##EQU1## includes a computer for computing one PCM sample from a sequence of sigma-delta samples in synchronism with the PCM clock and also a comparison circuit for determining whether phase correction of the PCM clock is necessary to lock the generation of the PCM samples on the sigma-delta clock extracted from the received sigma-delta signal, the decimation filter including shifters which shift the computation process at least one sigma-delta clock pulse in order to provide phase control in the generation of the PCM samples.

摘要翻译： 用于将接收到的Σ-Δ脉冲序列与Σ-Δ时钟（fs）同步转换成具有根据公式“IMAGE”的PCM时钟的脉冲编码调制（PCM）采样序列的抽取滤波器包括计算机 用于从与PCM时钟同步的一系列Σ-Δ样本计算一个PCM采样，并且还包括一个比较电路，用于确定PCM时钟的相位校正是否需要在提取的Σ-Δ时钟上锁定PCM采样的产生 从所接收的Σ-Δ信号中，抽取滤波器包括使运算处理至少一个Σ-Δ时钟脉冲移位的移位器，以便在生成PCM采样时提供相位控制。