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公开(公告)号：US10686555B2
公开(公告)日：2020-06-16
申请号：US16401026
申请日：2019-05-01
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Bo-Mi Lim , Heung-Mook Kim , Nam-Ho Hur
Abstract: An apparatus and method for generating a broadcast signal frame for signaling a time interleaving mode are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to perform power-normalizing for reducing the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing time interleaving after performing the power-normalizing; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling a time interleaving mode corresponding to the time interleaver for each of physical layer pipes (PLPs).
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公开(公告)号：US10476997B2
公开(公告)日：2019-11-12
申请号：US15483911
申请日：2017-04-10
Inventor： Jae-Young Lee , Sung-Ik Park , Sun-Hyoung Kwon , Bo-Mi Lim , Heung-Mook Kim
Abstract: An apparatus and method for generating a broadcast signal frame for signaling a time interleaving mode are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a time interleaver configured to generate a time-interleaved signal by performing time interleaving on a BICM output signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling a time interleaving mode corresponding to the time interleaver for each of physical layer pipes (PLPs).
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公开(公告)号：US10447308B2
公开(公告)日：2019-10-15
申请号：US16192544
申请日：2018-11-15
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Bo-Mi Lim , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
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公开(公告)号：US10432229B2
公开(公告)日：2019-10-01
申请号：US16122667
申请日：2018-09-05
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Bo-Mi Lim , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
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公开(公告)号：US10419033B2
公开(公告)日：2019-09-17
申请号：US15425734
申请日：2017-02-06
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Bo-Mi Lim , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
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Patent Agency Ranking
公开(公告)号：US10404512B2
公开(公告)日：2019-09-03
申请号：US15737780
申请日：2016-06-30
Inventor： Jae-Young Lee , Sun-Hyoung Kwon , Sung-Ik Park , Bo-Mi Lim , Heung-Mook Kim
IPC: H03M13/11 , H04L27/26 , H04L1/00 , H03M13/25 , H03M13/27 , H03M13/29 , H03M13/35 , H04L5/00 , H03M13/15
Abstract: An apparatus and method for generating a broadcast signal frame corresponding to a time interleaver supporting a plurality of operation modes are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling time interleaver information corresponding to the time interleaver, the time interleaver uses one of time interleaver groups, and the time interleaver performs the interleaving by using one of a plurality of operation modes.
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公开(公告)号：US10225040B2
公开(公告)日：2019-03-05
申请号：US15212109
申请日：2016-07-15
Inventor： Sung-Ik Park , Jae-Young Lee , Sun-Hyoung Kwon , Heung-Mook Kim , Bo-Mi Lim , David Gomez-Barquero , Eduardo Garro , Jordi Joan Gimenez
Abstract: An apparatus for transmitting broadcast signal according to the present invention includes an enhanced layer stream partitioner configured to generate first and second enhanced layer partitioned signals by partitioning an enhanced layer stream; first and second combiners configured to generate a first multiplexed signal corresponding to the first enhanced layer partitioned signal and a second multiplexed signal corresponding to the second enhanced layer partitioned signal; first and second power normalizers configured to reduce powers of the first multiplexed signal and the second multiplexed signal; first and second time interleavers configured to generate a first time-interleaved signal corresponding to the first enhanced layer partitioned signal and a second time-interleaved signal corresponding to the second enhanced layer partitioned signal; and first and second OFDM transmitters configured to transmit signals corresponding to the first time-interleaved signal and the second time-interleaved signal using an OFDM communication scheme.
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公开(公告)号：US10205467B2
公开(公告)日：2019-02-12
申请号：US15612972
申请日：2017-06-02
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Bo-Mi Lim , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
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公开(公告)号：US10097211B2
公开(公告)日：2018-10-09
申请号：US15612801
申请日：2017-06-02
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Bo-Mi Lim , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
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公开(公告)号：US09800268B2
公开(公告)日：2017-10-24
申请号：US14719254
申请日：2015-05-21
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Bo-Mi Lim , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
CPC classification number: H03M13/2767 , H03M13/1105 , H04L1/0041 , H04L1/0071
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
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