公开(公告)号：US20080206944A1

公开(公告)日：2008-08-28

申请号：US11709715

申请日：2007-02-23

Applicant: Chiao-Shun Chuang ,  Hung-Ta Weng

Inventor： Chiao-Shun Chuang ,  Hung-Ta Weng

IPC: H01L21/8234

CPC classification number: H01L29/7813 ,  H01L21/26586 ,  H01L29/0619 ,  H01L29/66719 ,  H01L29/66734 ,  H01L29/7806

Abstract: A method uses simplified processes to complete the forming of the trench DMOS transistors and Schottky contacts. In the processes, only four masks, i.e. a trench pattern mask, a contact-hole pattern mask, a P+ contact pattern mask and a conductive-wire pattern mask, are applied to create desired trench DMOS transistors. In addition to the trench DMOS transistors, a Schottky contact is simultaneously formed at a junction between a conductive layer and a doped body region in the trench DMOS transistors without additional photolithography process.

Abstract translation: 一种方法使用简化的过程来完成沟槽DMOS晶体管和肖特基触点的形成。 在该过程中，仅施加四个掩模，即沟槽图案掩模，接触孔图案掩模，P +接触图案掩模和导线图案掩模，以产生所需的沟槽DMOS晶体管。 除了沟槽DMOS晶体管之外，肖特基接触同时形成在沟道DMOS晶体管中的导电层和掺杂体区之间的结处，而不需要额外的光刻工艺。

公开(公告)号：US20060186465A1

公开(公告)日：2006-08-24

申请号：US11329870

申请日：2006-01-10

Applicant: Hsin-Huang Hsieh ,  Chiao-Shun Chuang ,  Chien-Ping Chang ,  Mao-Song Tseng

Inventor： Hsin-Huang Hsieh ,  Chiao-Shun Chuang ,  Chien-Ping Chang ,  Mao-Song Tseng

IPC: H01L31/113

CPC classification number: H01L29/7811 ,  H01L29/4232 ,  H01L29/4238 ,  H01L29/7813

Abstract: A DMOS device having a trench bus structure thereof is introduced. The trench bus structure comprises a field oxide layer formed on a P substrate, and a trench extending from an top surface of the field oxide layer down to a lower portion of the P substrate. A gate oxide layer and a polysilicon bus are formed to fill the trench as a main portion of the bus structure. In addition, an isolation layer and a metal line are formed atop the polysilicon bus and the field oxide layer. An opening is formed in the isolation layer to form connections between the polysilicon bus and the metal line. In specific embodiments, the bus trench and the gate trenches of the DMOS device are formed simultaneously, and the polysilicon bus and the gate electrode are formed simultaneously as well. Therefore, the bus structure is able to form the DMOS transistor without demanding any lithographic step for defining the position of the polysilicon bus.

公开(公告)号：US20050009277A1

公开(公告)日：2005-01-13

申请号：US10771808

申请日：2004-02-03

Applicant: Chiao-Shun Chuang ,  Hsin-Huang Hsieh ,  Mao-Song Tseng ,  Chien-Ping Chang

Inventor： Chiao-Shun Chuang ,  Hsin-Huang Hsieh ,  Mao-Song Tseng ,  Chien-Ping Chang

IPC: H01L29/417 ,  H01L29/78 ,  H01L21/336

CPC classification number: H01L29/7811 ,  H01L29/41766 ,  H01L29/7802 ,  H01L29/7813

Abstract: Embodiments of the invention provide a termination structure of DMOS device and a method of forming the same. In forming the termination structure, a silicon substrate with an epitaxial layer formed thereon is provided. A body region defined by doping the epitaxial layer is then selectively etched to form a plurality of DMOS trenches therein. Thereafter, a gate oxide layer is formed over exposed surfaces in the body region and a termination oxide layer is formed to encircle the body region. Afterward, a polysilicon layer is deposited over all the exposed surfaces, and then selectively etched to form a plurality of poly gates in the DMOS trenches and a polysilicon plate having an extending portion toward the body region over the termination oxide layer. By using the termination polysilicon layer as an implantation mask, sources are formed in the body region. Afterward, an isolation layer and a source metal contact layer are deposited over the structure, in which the isolation layer is utilized to protect the polysilicon gates, and also the source metal contact layer is utilized to ground both the body region and the polysilicon plate.

Abstract translation: 本发明的实施例提供了一种DMOS器件的端接结构及其形成方法。 在形成端接结构时，提供其上形成有外延层的硅衬底。 然后选择性地蚀刻通过掺杂外延层限定的体区，以在其中形成多个DMOS沟槽。 此后，在体区域的暴露表面上形成栅极氧化物层，并且形成终止氧化物层以环绕身体区域。 之后，在所有暴露的表面上沉积多晶硅层，然后选择性地蚀刻以在DMOS沟槽中形成多个多晶硅栅极，以及在端接氧化物层上具有朝向主体区域的延伸部分的多晶硅板。 通过使用端接多晶硅层作为注入掩模，在体区中形成源。 之后，在结构上沉积隔离层和源极金属接触层，其中隔离层用于保护多晶硅栅极，并且源极金属接触层用于接地体区域和多晶硅板。

公开(公告)号：US06660592B2

公开(公告)日：2003-12-09

申请号：US10160299

申请日：2002-05-29

Applicant: Chiao-Shun Chuang ,  Chien-Ping Chang ,  Mao-Song Tseng ,  Cheng-Tsung Ni

Inventor： Chiao-Shun Chuang ,  Chien-Ping Chang ,  Mao-Song Tseng ,  Cheng-Tsung Ni

IPC: H01L21336

CPC classification number: H01L29/7813 ,  H01L29/41766 ,  H01L29/7802

Abstract: Embodiment of the present invention are directed to improving the performance of a DMOS transistor. A method of fabricating a DMOS transistor comprises providing a semiconductor substrate having a gate oxide and a trenched gate, and implanting first conductive dopants into a surface of the semiconductor substrate adjacent to the trenched gate to form a first doping region. An insulating layer is deposited over the semiconductor substrate; and selectively etching the insulating layer to form a source contact window over a central portion of the first doping region and to leave an insulator structure above the trenched gate. The source contact window of the insulating layer has an enlarged top portion which is larger in size than a bottom portion of the source contact window closer to the first doping region than the enlarged top portion. The enlarged top portion is typically bowl-shaped. Second conductive dopants are implanted through the source contact window to form a second doping region in the central portion of the first doping region.