公开(公告)号：US20150034969A1

公开(公告)日：2015-02-05

申请号：US13957115

申请日：2013-08-01

Applicant: General Electric Company

Inventor： Avinash Srikrishnan Kashyap ,  Peter Micah Sandvik ,  James Jay McMahon ,  Ljubisa Dragoljub Stevanovic

IPC: H01L29/06 ,  H01L29/74 ,  H01L29/78 ,  H01L29/16

CPC classification number: H01L27/0617 ,  H01L27/0248 ,  H01L27/0251 ,  H01L27/0255 ,  H01L29/1608 ,  H01L29/7395 ,  H01L29/74 ,  H01L29/7424 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/861

Abstract: A power transistor assembly and method of operating the assembly are provided. The power transistor assembly includes integrated transient voltage suppression on a single semiconductor substrate and includes a transistor formed of a wide band gap material, the transistor including a gate terminal, a source terminal, and a drain terminal, the transistor further including a predetermined maximum allowable gate voltage value, and a transient voltage suppression (TVS) device formed of a wide band gap material, the TVS device formed with the transistor as a single semiconductor device, the TVS device electrically coupled to the transistor between at least one of the gate and source terminals and the drain and source terminals, the TVS device including a breakdown voltage limitation selected to be greater than the predetermined maximum allowable gate voltage value.

Abstract translation: 提供功率晶体管组件和操作组件的方法。 所述功率晶体管组件包括在单个半导体衬底上的集成瞬态电压抑制，并且包括由宽带隙材料形成的晶体管，所述晶体管包括栅极端子，源极端子和漏极端子，所述晶体管还包括预定的最大允许量 栅极电压值以及由宽带隙材料形成的瞬态电压抑制（TVS）器件，所述TVS器件由所述晶体管形成为单个半导体器件，所述TVS器件电耦合到所述晶体管的至少一个栅极和 源极端子和漏极和源极端子，TVS器件包括被选择为大于预定的最大允许栅极电压值的击穿电压限制。