公开(公告)号：US20240185047A1

公开(公告)日：2024-06-06

申请号：US18464935

申请日：2023-09-11

Applicant: Google LLC

Inventor： Jonathan Ross ,  Gregory Michael Thorson

IPC: G06N3/063 ,  G06F15/80 ,  G06N3/045 ,  G06N3/08 ,  G06N5/04

CPC classification number: G06N3/063 ,  G06F15/8046 ,  G06N3/045 ,  G06N3/08 ,  G06N5/04

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for computing a layer output for a convolutional neural network layer, the method comprising: receiving a plurality of activation inputs; forming a plurality of vector inputs from the plurality of activation inputs, each vector input comprising values from a distinct region within the multi-dimensional matrix; sending the plurality of vector inputs to one or more cells along a first dimension of the systolic array; generating a plurality of rotated kernel structures from each of the plurality of kernel; sending each kernel structure and each rotated kernel structure to one or more cells along a second dimension of the systolic array; causing the systolic array to generate an accumulated output based on the plurality of value inputs and the plurality of kernels; and generating the layer output from the accumulated output.

公开(公告)号：US11620508B2

公开(公告)日：2023-04-04

申请号：US16245406

申请日：2019-01-11

Applicant: Google LLC

Inventor： Gregory Michael Thorson ,  Christopher Aaron Clark ,  Dan Luu

IPC: G06F7/544 ,  G06N3/063 ,  G06N3/08 ,  G06F5/08 ,  G06N5/04

Abstract: A circuit for performing neural network computations for a neural network comprising a plurality of layers, the circuit comprising: activation circuitry configured to receive a vector of accumulated values and configured to apply a function to each accumulated value to generate a vector of activation values; and normalization circuitry coupled to the activation circuitry and configured to generate a respective normalized value from each activation value.

公开(公告)号：US20220366255A1

公开(公告)日：2022-11-17

申请号：US17874573

申请日：2022-07-27

Applicant: Google LLC

Inventor： Jonathan Ross ,  Norman Paul Jouppi ,  Andrew Everett Phelps ,  Reginald Clifford Young ,  Thomas Norrie ,  Gregory Michael Thorson ,  Dan Luu

IPC: G06N3/08 ,  G06F15/80 ,  G06N3/063 ,  G06N5/04

Abstract: A circuit for performing neural network computations for a neural network comprising a plurality of neural network layers, the circuit comprising: a matrix computation unit configured to, for each of the plurality of neural network layers: receive a plurality of weight inputs and a plurality of activation inputs for the neural network layer, and generate a plurality of accumulated values based on the plurality of weight inputs and the plurality of activation inputs; and a vector computation unit communicatively coupled to the matrix computation unit and configured to, for each of the plurality of neural network layers: apply an activation function to each accumulated value generated by the matrix computation unit to generate a plurality of activated values for the neural network layer.

公开(公告)号：US10956537B2

公开(公告)日：2021-03-23

申请号：US16840972

申请日：2020-04-06

Applicant: Google LLC

Inventor： Dong Hyuk Woo ,  Gregory Michael Thorson ,  Andrew Everett Phelps ,  Olivier Temam ,  Jonathan Ross ,  Christopher Aaron Clark

IPC: G06F17/16 ,  G06F7/76 ,  G06F9/30 ,  G06N3/063 ,  G06N3/08

Abstract: A circuit comprises an input register configured to receive an input vector of elements, a control register configured to receive a control vector of elements, wherein each element of the control vector corresponds to a respective element of the input vector, and wherein each element specifies a permutation of a corresponding element of the input vector, and a permute execution circuit configured to generate an output vector of elements corresponding to a permutation of the input vector. Generating each element of the output vector comprises accessing, at the input register, a particular element of the input vector, accessing, at the control register, a particular element of the control vector corresponding to the particular element of the input vector, and outputting the particular element of the input vector as an element at a particular position of the output vector that is selected based on the particular element of the control vector.

公开(公告)号：US20210019618A1

公开(公告)日：2021-01-21

申请号：US16915161

申请日：2020-06-29

Applicant: Google LLC

Inventor： Jonathan Ross ,  Norman Paul Jouppi ,  Andrew Everett Phelps ,  Reginald Clifford Young ,  Thomas Norrie ,  Gregory Michael Thorson ,  Dan Luu

IPC: G06N3/08 ,  G06F15/80 ,  G06N3/063 ,  G06N5/04

Abstract: A circuit for performing neural network computations for a neural network comprising a plurality of neural network layers, the circuit comprising: a matrix computation unit configured to, for each of the plurality of neural network layers: receive a plurality of weight inputs and a plurality of activation inputs for the neural network layer, and generate a plurality of accumulated values based on the plurality of weight inputs and the plurality of activation inputs; and a vector computation unit communicatively coupled to the matrix computation unit and configured to, for each of the plurality of neural network layers: apply an activation function to each accumulated value generated by the matrix computation unit to generate a plurality of activated values for the neural network layer.

公开(公告)号：US20200301996A1

公开(公告)日：2020-09-24

申请号：US16840972

申请日：2020-04-06

Applicant: Google LLC

Inventor： Dong Hyuk Woo ,  Gregory Michael Thorson ,  Andrew Everett Phelps ,  Olivier Temam ,  Jonathan Ross ,  Christopher Aaron Clark

IPC: G06F17/16 ,  G06F7/76 ,  G06F9/30

Abstract: A circuit comprises an input register configured to receive an input vector of elements, a control register configured to receive a control vector of elements, wherein each element of the control vector corresponds to a respective element of the input vector, and wherein each element specifies a permutation of a corresponding element of the input vector, and a permute execution circuit configured to generate an output vector of elements corresponding to a permutation of the input vector. Generating each element of the output vector comprises accessing, at the input register, a particular element of the input vector, accessing, at the control register, a particular element of the control vector corresponding to the particular element of the input vector, and outputting the particular element of the input vector as an element at a particular position of the output vector that is selected based on the particular element of the control vector.

公开(公告)号：US10108581B1

公开(公告)日：2018-10-23

申请号：US15477791

申请日：2017-04-03

Applicant: Google LLC

Inventor： Gregory Michael Thorson ,  Andrew Everett Phelps ,  Olivier Temam

IPC: G06F9/30 ,  G06F15/80

Abstract: A vector reduction circuit configured to reduce an input vector of elements comprises a plurality of cells, wherein each of the plurality of cells other than a designated first cell that receives a designated first element of the input vector is configured to receive a particular element of the input vector, receive, from another of the one or more cells, a temporary reduction element, perform a reduction operation using the particular element and the temporary reduction element, and provide, as a new temporary reduction element, a result of performing the reduction operation using the particular element and the temporary reduction element. The vector reduction circuit also comprises an output circuit configured to provide, for output as a reduction of the input vector, a new temporary reduction element corresponding to a result of performing the reduction operation using a last element of the input vector.

公开(公告)号：US10074051B2

公开(公告)日：2018-09-11

申请号：US15389288

申请日：2016-12-22

Applicant: Google LLC

Inventor： Gregory Michael Thorson ,  Christopher Aaron Clark ,  Dan Luu

IPC: G06N3/063 ,  G06N3/08 ,  G06N5/04

CPC classification number: G06N3/08 ,  G06N3/063 ,  G06N5/04

Abstract: A circuit for performing neural network computations for a neural network comprising a plurality of layers, the circuit comprising: activation circuitry configured to receive a vector of accumulated values and configured to apply a function to each accumulated value to generate a vector of activation values; and normalization circuitry coupled to the activation circuitry and configured to generate a respective normalized value from each activation value.

公开(公告)号：US20180253403A1

公开(公告)日：2018-09-06

申请号：US15966275

申请日：2018-04-30

Applicant: Google LLC

Inventor： Dong Hyuk Woo ,  Gregory Michael Thorson ,  Andrew Everett Phelps ,  Olivier Temam ,  Jonathan Ross ,  Christopher Aaron Clark

IPC: G06F17/16

CPC classification number: G06F17/16 ,  G06F7/76 ,  G06F9/30032 ,  G06F9/30036

Abstract: A circuit comprises an input register configured to receive an input vector of elements, a control register configured to receive a control vector of elements, wherein each element of the control vector corresponds to a respective element of the input vector, and wherein each element specifies a permutation of a corresponding element of the input vector, and a permute execution circuit configured to generate an output vector of elements corresponding to a permutation of the input vector. Generating each element of the output vector comprises accessing, at the input register, a particular element of the input vector, accessing, at the control register, a particular element of the control vector corresponding to the particular element of the input vector, and outputting the particular element of the input vector as an element at a particular position of the output vector that is selected based on the particular element of the control vector.

公开(公告)号：US12014272B2

公开(公告)日：2024-06-18

申请号：US18176640

申请日：2023-03-01

Applicant: Google LLC

Inventor： Gregory Michael Thorson ,  Christopher Aaron Clark ,  Dan Luu

IPC: G06N3/08 ,  G06F5/08 ,  G06F7/544 ,  G06N3/063 ,  G06N5/04

CPC classification number: G06N3/08 ,  G06F5/08 ,  G06F7/544 ,  G06N3/063 ,  G06N5/04

Abstract: A circuit for performing neural network computations for a neural network comprising a plurality of layers, the circuit comprising: activation circuitry configured to receive a vector of accumulated values and configured to apply a function to each accumulated value to generate a vector of activation values; and normalization circuitry coupled to the activation circuitry and configured to generate a respective normalized value from each activation value.