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公开(公告)号：US20230413618A1
公开(公告)日：2023-12-21
申请号：US18034393
申请日：2020-12-24
发明人： Jingang FANG , Luke DING , Jun LIU , Wei LI , Jun CHENG
IPC分类号： H10K59/126 , H10K59/12 , H10K71/00 , H10K59/131
CPC分类号： H10K59/126 , H10K59/131 , H10K71/00 , H10K59/1201
摘要： Disclosed are a display panel, a manufacturing method therefor, and a display apparatus. The display panel comprises: a base substrate (10); a padding layer (20) arranged at one side of the base substrate (10); a thin film transistor structure layer (30) arranged at one side of the base substrate (10); a planar layer (40) arranged at the side of the thin film transistor structure layer (30) away from the base substrate (10); an organic electroluminescent device (50) arranged at the side of the planar layer (40) away from the base substrate (10), the organic electroluminescent device (50) comprising an anode (51), an effective light emission layer (52), and a cathode (53) in a layered arrangement; an auxiliary electrode (60) arranged on the side of the thin film transistor structure layer (30) away from the base substrate (10).
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22.发明申请公开(公告)号：US20220069254A1
公开(公告)日：2022-03-03
申请号：US17393661
申请日：2021-08-04
发明人： Jun LIU , Jingang FANG , Yang ZHANG , Tongshang SU , Wei HE , Bin ZHOU , Ning LIU
摘要： A light-emitting substrate includes; a base, an isolation portion disposed on the base and located in an isolation region located outside a light-emitting region, and a second insulating pattern located in the light-emitting region. The isolation portion includes a first conductive pattern, a second conductive pattern and a first insulating pattern that are sequentially stacked on the base; an orthogonal projection of the first conductive pattern on the base is located within an orthogonal projection of the second conductive pattern on the base; and a side face of the first conductive pattern proximate to the light-emitting region and a corresponding side face of the second conductive pattern proximate to the light-emitting region have a first gap therebetween. A side face of the second insulating pattern proximate to the first insulating pattern and a side face of the first insulating pattern proximate to the second insulating pattern have a second gap therebetween.
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公开(公告)号：US20200251545A1
公开(公告)日：2020-08-06
申请号：US16704706
申请日：2019-12-05
发明人： Jun LIU , Liangchen YAN , Bin ZHOU , Yongchao HUANG , Luke DING , Wei LI , Biao LUO , Xuehai GUI
IPC分类号： H01L27/32
摘要： Provided are a display panel and a manufacturing method thereof and a display device. The display panel includes a substrate and pixel units formed on the substrate, wherein, along a thickness direction of the display panel, at least one of the pixel units includes a driving and light filtering structure and a light emitting element formed at a side of the driving and light filtering structure facing away from the substrate, and wherein the driving and light filtering structure includes a driving part and a light filtering part, and the light filtering part is disposed in an accommodating hole penetrating through an insulating layer in the driving part along the thickness direction.
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24.发明申请公开(公告)号：US20190096926A1
公开(公告)日：2019-03-28
申请号：US16090752
申请日：2018-02-13
发明人： Jun LIU , Tongshang SU
IPC分类号： H01L27/12 , H01L21/02 , H01L21/225 , H01L21/324 , H01L21/3065 , H01L29/786
摘要： Embodiments of this disclosure provide a thin film of poly-silicon and a method for fabricating the same, and a thin film transistor and a method for fabricating the same, where a metal layer, a buffer layer, and an amorphous-silicon layer are formed on an underlying substrate successively, and metal atoms of the metal layer can be diffused to come into contact with the amorphous-silicon layer, so that the amorphous-silicon can be converted into a poly-silicon layer under the catalysis of the metal ions.
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公开(公告)号：US20240215342A1
公开(公告)日：2024-06-27
申请号：US17915522
申请日：2021-05-28
发明人： Yongchao HUANG , Jingang FANG , Jun CHENG , Xinxin WANG , Jun LIU , Qinghe WANG , Leilei CHENG , Bin ZHOU , Ce ZHAO , Liangchen YAN
IPC分类号： H10K59/126 , H10K59/12 , H10K59/122
CPC分类号： H10K59/126 , H10K59/1201 , H10K59/122
摘要： A display panel includes a substrate, a driving layer and a light-emitting control layer. The driving layer is provided with a plurality of driving transistors arranged into a plurality of transistor rows in a column direction. The light-emitting control layer includes a plurality of light-emitting devices arranged into a plurality of device rows in the column direction, the device rows is spaced apart by the transistor row in the column direction, and the transistor rows is spaced apart by the device row in the column direction. The pixel-defining layer is provided with a plurality of blocking grooves recessed toward the substrate, the plurality of blocking grooves are arranged in the column direction, at least one of the plurality of blocking grooves is arranged between the transistor row and the device row adjacent in the column direction, and a light-shielding layer is arranged in the blocking groove.
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26.发明公开公开(公告)号：US20240164179A1
公开(公告)日：2024-05-16
申请号：US17918630
申请日：2021-11-23
发明人： Yang ZHANG , Bin ZHOU , Ning LIU , Jun LIU , Peng WANG , Lei ZHOU , Duoduo WANG
CPC分类号： H10K59/80522 , H10K59/1201
摘要： A light-emitting substrate includes: a substrate; and at least one coupling portion and at least one auxiliary cathode pattern disposed on the substrate. Each auxiliary cathode region is provided with a coupling portion and an auxiliary cathode pattern coupled to the coupling portion. The auxiliary cathode pattern includes at least one disconnection portion, and each disconnection portion includes first, second and third conductive pattern layers. An orthographic projection of an edge of the second conductive pattern layer on the substrate is located within orthographic projections of edges of the third and first conductive pattern layers on the substrate. A total perimeter of at least one orthographic projection, on the substrate, of at least one edge of at least one third conductive pattern layer in the at least one disconnection portion is greater than a perimeter of an orthographic projection of an edge of the auxiliary cathode region on the substrate.
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公开(公告)号：US20210367017A1
公开(公告)日：2021-11-25
申请号：US17241703
申请日：2021-04-27
发明人： Ning LIU , Jun LIU , Wei SONG , Qinghe WANG , Bin ZHOU , Liangchen YAN
IPC分类号： H01L27/32
摘要： An array substrate, a method for manufacturing the array substrate and a display device are provided. The array substrate includes: a base substrate, and a thin film transistor, a storage capacitor, and a lapping pattern for connecting the thin film transistor to the storage capacitor arranged on the base substrate; wherein the thin film transistor includes a semiconductor layer, a gate insulation layer, a gate electrode, an interlayer insulation layer, a source electrode and a drain electrode arranged sequentially in that order; the interlayer insulation layer includes at least two inorganic insulation layers and at least one organic insulation layer laminated one on another, and both a layer proximate to the base substrate and a layer distal to the base substrate in the interlayer insulation layer are the inorganic insulation layers.
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公开(公告)号：US20210175263A1
公开(公告)日：2021-06-10
申请号：US16859558
申请日：2020-04-27
IPC分类号： H01L27/12 , H01L21/02 , H01L29/66 , H01L29/24 , H01L29/786
摘要： An array substrate, a method for manufacturing the same and a display device are provided. The method includes: providing a base substrate; forming a conductive material thin film on the base substrate; forming a first photoresist layer on a side of the conductive material thin film distal to the base substrate; etching the conductive material thin film by using the first photoresist layer as a mask to obtain a first etched pattern; removing third covering portions of the first photoresist layer to obtain a second photoresist layer; and etching the first etched pattern by using the second photoresist layer as a mask to obtain a gate electrode and a signal line.
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公开(公告)号：US20210066352A1
公开(公告)日：2021-03-04
申请号：US16919903
申请日：2020-07-02
发明人： Leilei CHENG , Bin ZHOU , Jun LIU , Luke DING , Qinghe WANG , Yongchao HUANG
IPC分类号： H01L27/12 , G02F1/1333 , G02F1/1362
摘要： An array substrate includes an insulation layer and one or more stepped holes each penetrating through the insulation layer in a direction perpendicular to the insulation layer. Each stepped hole includes a first hole and a second hole under the first hole, a radius of the first hole at a bottom is a first radius, a radius of the second hole at a top is a second radius which is substantially smaller than the first radius, and a difference between the first radius and the second radius is 0.2 μm to 0.6 μm.
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公开(公告)号：US20180174799A1
公开(公告)日：2018-06-21
申请号：US15736278
申请日：2017-05-25
IPC分类号： H01J37/32
CPC分类号： H01J37/321 , H01J37/32119 , H01J37/32651 , H01J2237/3344
摘要： The present disclosure provides an inductively coupled plasma device, comprising a reaction chamber, a dielectric coupling plate, and a coil above the dielectric coupling plate. The dielectric coupling plate comprises at least two layers. The dielectric coupling plate comprises a plurality of regions, each region being provided with an electric field regulating structure, the electric field regulating structure being located between the at least two layers of the dielectric coupling plate. The electric field regulating structure is configured to regulate an intensity of an electric field that enters the reaction chamber through each region of the dielectric coupling plate.
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