公开(公告)号：US11295998B2

公开(公告)日：2022-04-05

申请号：US15945641

申请日：2018-04-04

Applicant: Intel Corporation

Inventor： Stephen Christianson ,  Stephen Hall ,  Emile Davies-Venn ,  Dong-Ho Han ,  Kemal Aygun ,  Konika Ganguly ,  Jun Liao ,  M. Reza Zamani ,  Cory Mason ,  Kirankumar Kamisetty

IPC: H01L23/16 ,  H01L23/66 ,  H01L23/00 ,  H01P3/08 ,  H01L21/48 ,  H01P11/00

Abstract: Techniques for fabricating a package substrate and/or a stiffener for a semiconductor package are described. For one technique, a package substrate comprises: a routing layer comprising a dielectric layer. A stiffener may be above the routing layer and a conductive line may be on the routing layer, the conductive line comprising first and second portions, the first portion having a first width, the second portion having a second width, the conductive line extending from a first region of the routing layer to a second region of the routing layer, the first region being under the stiffener, the second region being outside the stiffener, the first portion being on the first region, and the second portion being on the second region. One or more portions of the conductive line can be perpendicular to an edge of the stiffener. The perpendicular portion(s) may comprise a transition between the first and second widths.

公开(公告)号：US20210335712A1

公开(公告)日：2021-10-28

申请号：US17371293

申请日：2021-07-09

Applicant: Intel Corporation

Inventor： Amit Kumar Jain ,  Sameer Shekhar ,  Chin Lee Kuan ,  Kevin Joseph Doran ,  Dong-Ho Han

IPC: H01L23/538 ,  H01L49/02 ,  H01L23/00

Abstract: Microelectronic assemblies, related devices, and methods are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate; a bridge, embedded in the package substrate, wherein the bridge includes an integral passive component, and wherein a surface of the bridge include first contacts in a first interconnect area and second contacts in a second interconnect area; a first die coupled to the passive component via the first contacts in the first interconnect area; and a second die coupled to the second contacts in the second interconnect area.

公开(公告)号：US20210120665A1

公开(公告)日：2021-04-22

申请号：US17133113

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Jaejin Lee ,  Isaac Simpson ,  Dong-Ho Han ,  Jose Salazar Delgado ,  Arturo Navarro Alvarez

IPC: H05K1/02

Abstract: Electromagnetic interference (EMI) shields having attenuation interfaces are disclosed. A disclosed example EMI shield includes side walls defining sides of the EMI shield, and an attenuation interface to be placed into contact with a circuit board. The attenuation interface includes an inner perimeter having an EMI absorber and an outer perimeter having a metal backing to at least partially surround the EMI absorber.

公开(公告)号：US10950555B2

公开(公告)日：2021-03-16

申请号：US16481031

申请日：2017-03-30

Applicant: Intel Corporation

Inventor： Kaladhar Radhakrishnan ,  Jaejin Lee ,  Hao-Han Hsu ,  Chung-Hao J. Chen ,  Dong-Ho Han

IPC: H01L23/66 ,  H01L23/552 ,  H01L21/48 ,  H01L23/498 ,  H01L25/18 ,  H05K1/18 ,  H01L23/64 ,  H01L49/02

Abstract: Semiconductor packages and a method of forming a semiconductor package are described. The semiconductor package has a foundation layer, a conductive layer formed in the foundation layer, and a magnetic layer formed between the conductive and the foundation layer. The conductive layer and the magnetic layer are coupled to form a low-profile inductor shield. The semiconductor package also has a dielectric layer formed between the magnetic and foundation layer. The foundation layer is mounted between a motherboard and a semiconductor die, where the foundation layer is attached to the motherboard with solder balls. Accordingly, the low-profile inductor shield may include a z-height that is less than a z-height of the solder balls. The low-profile inductor shield may have solder pads that are coupled to the conductive layer. The foundation layer may include at least one of voltage regulator and inductor, where the inductor is located above the low-profile inductor shield.