公开(公告)号：US20170177977A1

公开(公告)日：2017-06-22

申请号：US15452583

申请日：2017-03-07

Applicant: Intel Corporation

Inventor： Jorge E. Caviedes ,  Sin Lin Wu

IPC: G06K9/62 ,  G06F17/30 ,  G06K9/20

CPC classification number: G06K9/6215 ,  G06F17/30259 ,  G06F17/30271 ,  G06F17/3028 ,  G06K9/00624 ,  G06K9/2036 ,  G06K9/6201 ,  G06K9/6202 ,  G06K9/6262

Abstract: A processor computes a measure of input image structural complexity of an input image, and searches a database of true positives to find one or more entries in the database that represent true positive images that are structurally similar to the input image. The processor compares a measure of signal quality of the input image and a measure of signal quality of one of the true positive images, as retrieved from the database, and based on the comparison updates a control variable that configures a signal quality conditioning process that is to be performed on the input image prior to processing of the input image by a computer vision processor thus improving performance of the computer vision task. Other embodiments are also described and claimed.

公开(公告)号：US20170013282A1

公开(公告)日：2017-01-12

申请号：US15271152

申请日：2016-09-20

Applicant: Intel Corporation

Inventor： Jorge E. Caviedes ,  Mahesh M. Subedar ,  Khasim S. Dudekula

IPC: H04N19/86 ,  H04N19/14 ,  H04N19/117

CPC classification number: H04N19/80 ,  H04N19/117 ,  H04N19/136 ,  H04N19/14 ,  H04N19/172 ,  H04N19/176 ,  H04N19/182 ,  H04N19/44 ,  H04N19/86 ,  H04W84/18

Abstract: Apparatus, systems and methods for adaptively reducing blocking artifacts in block-coded video are disclosed. In one implementation, a system includes processing logic at least capable of deblock filtering at least a portion of a line of video data based, at least in part, on edge information and texture information to generate at least a portion of a line of deblocked video data, and an image data output device responsive to the processing logic.

Abstract translation: 公开了用于自动减少块编码视频中的块伪影的装置，系统和方法。 在一个实现中，系统包括至少能够至少部分地基于边缘信息和纹理信息来对视频数据行的至少一部分进行去块滤波的处理逻辑，以生成解锁视频行的至少一部分 数据和响应于处理逻辑的图像数据输出装置。

公开(公告)号：US10360687B2

公开(公告)日：2019-07-23

申请号：US15200567

申请日：2016-07-01

Applicant: INTEL CORPORATION

Inventor： Yeongseon Lee ,  Nilesh A. Ahuja ,  Mahesh Subedar ,  Jorge E. Caviedes

IPC: G06T7/269 ,  H04N19/182 ,  H04N19/51 ,  H04N19/102 ,  H04N19/14 ,  H04N19/137 ,  H04N19/17

Abstract: Techniques are provided for detection and location of active display regions in videos with static borders. A methodology implementing the techniques according to an embodiment includes extracting features from rows and columns of pixels of a video frame. The features are based on horizontal gradient runs (HGRs) and vertical gradient runs (VGRs). The method also includes detecting one or more static regions of the frame, based on a comparison of differences between the features of the current video frame and features extracted from a previous video frame. The method further includes detecting one or more boundaries of the static regions based on a location of a maximum value of one of the features within the static region, if the maximum value is greater than a boundary detection threshold value. Determination of the active region in the current video frame is based on exclusion of the detected static regions.

公开(公告)号：US09613294B2

公开(公告)日：2017-04-04

申请号：US14663242

申请日：2015-03-19

Applicant: Intel Corporation

Inventor： Jorge E. Caviedes ,  Sin Lin Wu

IPC: G06K9/00 ,  G06K9/62 ,  G06K9/20

CPC classification number: G06K9/6215 ,  G06F17/30259 ,  G06F17/30271 ,  G06F17/3028 ,  G06K9/00624 ,  G06K9/2036 ,  G06K9/6201 ,  G06K9/6202 ,  G06K9/6262

Abstract: A processor computes a measure of input image structural complexity of an input image, and searches a database of true positives to find one or more entries in the database that represent true positive images that are structurally similar to the input image. The processor compares a measure of signal quality of the input image and a measure of signal quality of one of the true positive images, as retrieved from the database, and based on the comparison updates a control variable that configures a signal quality conditioning process that is to be performed on the input image prior to processing of the input image by a computer vision processor thus improving performance of the computer vision task. Other embodiments are also described and claimed.

公开(公告)号：US20160173752A1

公开(公告)日：2016-06-16

申请号：US14566226

申请日：2014-12-10

Applicant: Intel Corporation

Inventor： Jorge E. Caviedes ,  Sin Lin Wu ,  Artem Zinevich ,  Frank Ghenassia ,  Dmitri Bitouk

IPC: H04N5/232 ,  H04N1/00

CPC classification number: H04N1/00204 ,  H04N5/23229 ,  H04N5/23241

Abstract: Techniques are disclosed to adaptively control an image sensor and image signal processor (ISP), collectively known as an image pipeline, such that a minimum amount of power is consumed by an electronic device while producing images that can be accurately analyzed by a computer vision application. The techniques disclosed herein can be implemented in various electronic devices capable of capturing and processing image data, such as, for example, smart phones, wearable computers, laptops, tablets, and other mobile computing or imaging systems. In an embodiment, the techniques disclosed herein are implemented in a system-on-chip device.

Abstract translation: 公开了技术来自适应地控制图像传感器和图像信号处理器（ISP），统称为图像管线，使得电子设备消耗最小量的功率，同时产生可由计算机视觉应用程序精确分析的图像 。 本文公开的技术可以在能够捕获和处理图像数据的各种电子设备中实现，例如智能电话，可穿戴式计算机，笔记本电脑，平板电脑和其他移动计算或成像系统。 在一个实施例中，本文公开的技术在片上系统设备中实现。

公开(公告)号：US09020046B2

公开(公告)日：2015-04-28

申请号：US13960325

申请日：2013-08-06

Applicant: Intel Corporation

Inventor： Jorge E. Caviedes ,  Mahesh M. Subedar ,  Khasim S. Dudekula

IPC: H04B1/66 ,  H04N19/80 ,  H04N19/117 ,  H04N19/86 ,  G06K9/40

CPC classification number: H04N19/80 ,  H04N19/117 ,  H04N19/136 ,  H04N19/14 ,  H04N19/172 ,  H04N19/176 ,  H04N19/182 ,  H04N19/44 ,  H04N19/86 ,  H04W84/18

Abstract: Apparatus, systems and methods for adaptively reducing blocking artifacts in block-coded video are disclosed. In one implementation, a system includes processing logic at least capable of deblock filtering at least a portion of a line of video data based, at least in part, on edge information and texture information to generate at least a portion of a line of deblocked video data, and an image data output device responsive to the processing logic.

Abstract translation: 公开了用于自动减少块编码视频中的块伪影的装置，系统和方法。 在一个实现中，系统包括至少能够至少部分地基于边缘信息和纹理信息来对视频数据行的至少一部分进行去块滤波的处理逻辑，以生成解锁视频行的至少一部分 数据和响应于处理逻辑的图像数据输出装置。