公开(公告)号：US20190102671A1

公开(公告)日：2019-04-04

申请号：US15720982

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Ehud Cohen ,  Moshe Maor ,  Ashutosh Parkhi ,  Michael Behar ,  Yaniv Fais

IPC: G06N3/063 ,  G06N3/04 ,  G06N3/08 ,  G06K9/46 ,  G06K9/62 ,  G06K9/66

Abstract: A convolutional neural network (CNN) accelerator, including: a CNN circuit for performing a multiple-layer CNN computation, wherein the multiple layers are to receive an input feature according to an input feature map (IFM) and a weight matrix per output feature, wherein an output of a first layer provides an input for a next layer; and a mapping circuit to access a three-dimensional input matrix stored as a Z-major matrix; wherein the CNN circuit is to perform an inner-product direct convolution on the Z-major matrix, wherein the direct convolution lacks a lowering operation.

公开(公告)号：US20190004980A1

公开(公告)日：2019-01-03

申请号：US15638429

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Moshe Maor

IPC: G06F13/16 ,  G06F9/355

Abstract: A processor device is provided with hardware-implemented logic to receive an instruction including a pointer identifier and a pointer change value, the pointer identifier including a pointer address field encoded with an address of a line of memory corresponding to a location of a pointer of a particular one of the one or more cyclic buffers, one or more cushion bits, and a buffer identifier field encoded with a buffer identifier assigned to the particular cyclic buffer. The logic further enables the processor to identify that the instruction is to apply to the particular cyclic buffer based on the buffer identifier, determine that the pointer change value causes a wraparound of the pointer in the particular cyclic buffer, and fix location of the pointer in the particular cyclic buffer based on the wraparound.