公开(公告)号：US07859301B2

公开(公告)日：2010-12-28

申请号：US11799228

申请日：2007-04-30

申请人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

发明人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

IPC分类号： H03K19/173 ,  G05F1/573 ,  G11C16/06

CPC分类号： H03K19/0013 ,  G11C5/147 ,  H03K19/1776 ,  H03K19/17792

摘要： Power regulator circuitry for programmable memory elements on programmable logic device integrated circuits is provided. The programmable memory elements may each include a storage element formed from cross-coupled inverters and an address transistor. Address drivers may be used to supply address signals to the address transistors. The power regulator circuitry may include an address power supply circuit that produces a time-varying address power supply voltage to the address drivers and storage element power supply circuits that provide time-varying storage element power supply voltages to the cross-coupled inverters in the storage elements. Unity gain buffers may be used to distribute a reference voltage from a bandgap voltage reference to the power supply circuits. The power supply circuits may use voltage dividers and p-channel metal-oxide-semiconductor control transistors.

摘要翻译： 提供了可编程逻辑器件集成电路上可编程存储器元件的功率调节器电路。 可编程存储器元件可各自包括由交叉耦合的反相器和地址晶体管形成的存储元件。 地址驱动器可用于向地址晶体管提供地址信号。 功率调节器电路可以包括地址电源电路，其向地址驱动器和存储元件电源电路产生时变地址电源电压，所述地址驱动器和存储元件电源电路向存储器中的交叉耦合的反相器提供时变存储元件电源电压 元素。 单位增益缓冲器可以用于将带隙电压基准的参考电压分配给电源电路。 电源电路可以使用分压器和p沟道金属氧化物半导体控制晶体管。

公开(公告)号：US07705659B1

公开(公告)日：2010-04-27

申请号：US11824838

申请日：2007-07-02

申请人： Ping-Chen Liu

发明人： Ping-Chen Liu

IPC分类号： G11C5/14

CPC分类号： G11C5/147 ,  G11C11/417

摘要： Power regulator circuitry is provided for powering loads such as memory element arrays on integrated circuits. The power regulator circuitry may have a regulated power supply circuit and a switch-based power supply circuit. Control circuitry can control the regulated power supply circuit and the switch-based power supply circuit. The control circuitry may include a power supply power-on-reset control circuit. The power supply power-on-reset control circuit may receive a system power-on-reset control signal from a system power-on-reset control circuit. Based on the system power-on-reset control signal and monitored power supply voltages, the power supply power-on-reset control circuit may apply power-on-reset control signals to depletion mode transistors in the power regulator circuitry to ensure that nodes within the power regulator circuitry have defined values during power-up operations.

摘要翻译： 提供功率调节器电路用于为诸如集成电路上的存储元件阵列的负载供电。 功率调节器电路可以具有稳压电源电路和基于开关的电源电路。 控制电路可以控制稳压电源电路和基于开关的电源电路。 控制电路可以包括电源上电复位控制电路。 电源上电复位控制电路可以从系统上电复位控制电路接收系统上电复位控制信号。 基于系统上电复位控制信号和监测的电源电压，电源上电复位控制电路可以将电源复位控制信号施加到功率调节器电路中的耗尽型晶体管，以确保在 功率调节器电路在上电操作期间具有定义的值。

公开(公告)号：US08085063B2

公开(公告)日：2011-12-27

申请号：US12950963

申请日：2010-11-19

申请人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

发明人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

IPC分类号： H03K19/173

CPC分类号： H03K19/0013 ,  G11C5/147 ,  H03K19/1776 ,  H03K19/17792

摘要： Power regulator circuitry for programmable memory elements on programmable logic device integrated circuits is provided. The programmable memory elements may each include a storage element formed from cross-coupled inverters and an address transistor. Address drivers may be used to supply address signals to the address transistors. The power regulator circuitry may include an address power supply circuit that produces a time-varying address power supply voltage to the address drivers and storage element power supply circuits that provide time-varying storage element power supply voltages to the cross-coupled inverters in the storage elements. Unity gain buffers may be used to distribute a reference voltage from a bandgap voltage reference to the power supply circuits. The power supply circuits may use voltage dividers and p-channel metal-oxide-semiconductor control transistors.

摘要翻译： 提供了可编程逻辑器件集成电路上可编程存储器元件的功率调节器电路。 可编程存储器元件可各自包括由交叉耦合的反相器和地址晶体管形成的存储元件。 地址驱动器可用于向地址晶体管提供地址信号。 功率调节器电路可以包括地址电源电路，其向地址驱动器和存储元件电源电路产生时变地址电源电压，所述地址驱动器和存储元件电源电路向存储器中的交叉耦合的反相器提供时变存储元件电源电压 元素。 单位增益缓冲器可以用于将带隙电压基准的参考电压分配给电源电路。 电源电路可以使用分压器和p沟道金属氧化物半导体控制晶体管。

公开(公告)号：US20110062988A1

公开(公告)日：2011-03-17

申请号：US12950963

申请日：2010-11-19

申请人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

发明人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

IPC分类号： H03K19/177

CPC分类号： H03K19/0013 ,  G11C5/147 ,  H03K19/1776 ,  H03K19/17792

摘要： Power regulator circuitry for programmable memory elements on programmable logic device integrated circuits is provided. The programmable memory elements may each include a storage element formed from cross-coupled inverters and an address transistor. Address drivers may be used to supply address signals to the address transistors. The power regulator circuitry may include an address power supply circuit that produces a time-varying address power supply voltage to the address drivers and storage element power supply circuits that provide time-varying storage element power supply voltages to the cross-coupled inverters in the storage elements. Unity gain buffers may be used to distribute a reference voltage from a bandgap voltage reference to the power supply circuits. The power supply circuits may use voltage dividers and p-channel metal-oxide-semiconductor control transistors.

摘要翻译： 提供了可编程逻辑器件集成电路上可编程存储器元件的功率调节器电路。 可编程存储器元件可各自包括由交叉耦合的反相器和地址晶体管形成的存储元件。 地址驱动器可用于向地址晶体管提供地址信号。 功率调节器电路可以包括地址电源电路，其向地址驱动器和存储元件电源电路产生时变地址电源电压，所述地址驱动器和存储元件电源电路向存储器中的交叉耦合的反相器提供时变存储元件电源电压 元素。 单位增益缓冲器可以用于将带隙电压基准的参考电压分配给电源电路。 电源电路可以使用分压器和p沟道金属氧化物半导体控制晶体管。

公开(公告)号：US20100201332A1

公开(公告)日：2010-08-12

申请号：US12766622

申请日：2010-04-23

申请人： Thien Le ,  Ping-Chen Liu

发明人： Thien Le ,  Ping-Chen Liu

IPC分类号： G05F1/575

CPC分类号： G05F1/575

摘要： Voltage regulator circuitry is provided. The voltage regulator circuitry may contain a drive transistor that is controlled by the output of an operational amplifier. The drive transistor may supply a regulated voltage to a load. The operational amplifier may compare a reference voltage and a feedback signal at its inputs. The operational amplifier may include first and second stages. An adjustable resistor may be provided between the first and second stages. Control circuitry may control the resistance of the adjustable resistor based on the amount of current flowing through the load to ensure stable operation of the voltage regulator circuitry. Overshoot and undershoot detection and compensation circuitry may compensate for overshoot and undershoot in the regulated voltage. Voltage ramp control circuitry may be used to control the ramp rate of the regulated voltage.

摘要翻译： 提供稳压电路。 电压调节器电路可以包含由运算放大器的输出控制的驱动晶体管。 驱动晶体管可以向负载提供调节电压。 运算放大器可以在其输入端比较参考电压和反馈信号。 运算放大器可以包括第一和第二级。 可以在第一和第二级之间设置可调电阻器。 控制电路可以基于流过负载的电流量来控制可调电阻器的电阻，以确保稳压器电路的稳定运行。 过冲和下冲检测和补偿电路可能会补偿调节电压中的过冲和下冲。 电压斜坡控制电路可用于控制调节电压的斜坡率。

公开(公告)号：US07728569B1

公开(公告)日：2010-06-01

申请号：US11786312

申请日：2007-04-10

申请人： Thien Le ,  Ping-Chen Liu

发明人： Thien Le ,  Ping-Chen Liu

IPC分类号： G05F1/00 ,  G05F1/10

CPC分类号： G05F1/575

摘要： Voltage regulator circuitry is provided. The voltage regulator circuitry may contain a drive transistor that is controlled by the output of an operational amplifier. The drive transistor may supply a regulated voltage to a load. The operational amplifier may compare a reference voltage and a feedback signal at its inputs. The operational amplifier may include first and second stages. An adjustable resistor may be provided between the first and second stages. Control circuitry may control the resistance of the adjustable resistor based on the amount of current flowing through the load to ensure stable operation of the voltage regulator circuitry. Overshoot and undershoot detection and compensation circuitry may compensate for overshoot and undershoot in the regulated voltage. Voltage ramp control circuitry may be used to control the ramp rate of the regulated voltage.

摘要翻译： 提供稳压电路。 电压调节器电路可以包含由运算放大器的输出控制的驱动晶体管。 驱动晶体管可以向负载提供调节电压。 运算放大器可以在其输入端比较参考电压和反馈信号。 运算放大器可以包括第一和第二级。 可以在第一和第二级之间设置可调电阻器。 控制电路可以基于流过负载的电流量来控制可调电阻器的电阻，以确保稳压器电路的稳定运行。 过冲和下冲检测和补偿电路可能会补偿调节电压中的过冲和下冲。 电压斜坡控制电路可用于控制调节电压的斜坡率。

公开(公告)号：US06687157B1

公开(公告)日：2004-02-03

申请号：US10460097

申请日：2003-06-11

申请人： Ping-Chen Liu ,  Michael G. Ahrens ,  Kenneth V. Miu

发明人： Ping-Chen Liu ,  Michael G. Ahrens ,  Kenneth V. Miu

IPC分类号： G11C2900

CPC分类号： G11C29/50004 ,  G11C16/04 ,  G11C29/36 ,  G11C29/70 ,  G11C2029/1202

摘要： Disclosed are circuits and methods of identifying defective memory cells among rows and columns of memory cells. In one embodiment, all the memory cells in an array are programmed to conduct with a conventional read voltage applied and not to conduct with a conventional read-inhibit voltage applied. Any rows that conduct with the read-inhibit voltage applied are termed “leaky,” and are defective. Another read-inhibit voltage lower than the conventional level is selected to cause even leaky cells not to conduct. This test read-inhibit voltage is consecutively applied to each row under test. If one of the rows includes a leaky bit, that bit will conduct with the conventional read-inhibit voltage applied but will not conduct with the test read-inhibit voltage applied. The test flow therefore identifies a row as including a leaky bit when a leak is suppressed by application of the test read-inhibit voltage. A redundant row can be provided to replace a row having a leaky bit.

摘要翻译： 公开了识别存储器单元的行和列之间的有缺陷的存储单元的电路和方法。 在一个实施例中，阵列中的所有存储单元被编程为以施加的常规读取电压进行导通，并且不以施加的常规读取禁止电压进行导通。 任何以施加的禁止读取电压进行的行称为“泄漏”，并且是有缺陷的。 选择低于常规水平的另一个读禁止电压，以使均匀的漏电池不导通。 该测试读取禁止电压连续地应用于被测试的每一行。 如果其中一行包含泄漏位，则该位将以传统的禁止读取电压进行，但不会随着施加的测试读取禁止电压而导通。 因此，当通过施加测试读禁止电压来抑制泄漏时，测试流程将一行标识为包括泄漏位。 可以提供冗余行来替换具有泄漏位的行。