公开(公告)号：US08324876B1

公开(公告)日：2012-12-04

申请号：US12263251

申请日：2008-10-31

申请人： Thien Le ,  Ping-Chen Liu

发明人： Thien Le ,  Ping-Chen Liu

IPC分类号： G05F1/00

CPC分类号： G05F1/575

摘要： A low dropout (LDO) voltage regulator with unconditional frequency compensation is presented. The low dropout voltage regulator is implemented using a two-stage operational amplifier. The first stage amplifier has two input transistors, each of which is connected to a diode-connected transistor. A transistor is connected in parallel to the diode-connected transistors to increase the gain of the first stage amplifier. The LDO voltage regulator has a compensation capacitance input between the first stage amplifier and the second stage amplifier and a voltage on the compensation capacitance input adjusts the current through the diode-connected transistors, as well as the gain of the first stage amplifier. The second stage amplifier receives output from the first stage amplifier, and a compensation capacitor is connected between the compensation capacitance input of the operational amplifier and the output node of the LDO voltage regulator.

摘要翻译： 提出了一种具有无条件频率补偿的低压差（LDO）稳压器。 低压差稳压器采用两级运算放大器实现。 第一级放大器具有两个输入晶体管，每个输入晶体管连接到二极管连接的晶体管。 晶体管与二极管连接的晶体管并联连接，以增加第一级放大器的增益。 LDO稳压器在第一级放大器和第二级放大器之间具有补偿电容输入，并且补偿电容输入端的电压调节通过二极管连接的晶体管的电流以及第一级放大器的增益。 第二级放大器接收来自第一级放大器的输出，并且补偿电容器连接在运算放大器的补偿电容输入端和LDO稳压器的输出节点之间。

公开(公告)号：US08120411B1

公开(公告)日：2012-02-21

申请号：US12534007

申请日：2009-07-31

申请人： Ping-Chen Liu ,  Thien Le

发明人： Ping-Chen Liu ,  Thien Le

IPC分类号： G05F1/46

CPC分类号： H02M3/07 ,  H02M1/36

摘要： A charge pump circuit is provided that has a controllable ramp rate. The charge pump circuit may receive a control signal from a control circuit. The control signal may be asserted by the control circuit to turn on the charge pump circuit. When the charge pump circuit is turned on, the charge pump circuit produces an output voltage. The output voltage ramps up from an initial value to a desired target value. During the ramp up process, a ramp rate regulation circuit monitors the output voltage and ensures that the ramp rate does not exceed a desired maximum value. A capacitor may be charged at a desired ramp rate to use as a time-varying reference voltage. A feedback circuit may be used to maintain the output voltage at the desired target value once the ramp-up process is complete.

摘要翻译： 提供具有可控升压速率的电荷泵电路。 电荷泵电路可以从控制电路接收控制信号。 控制信号可由控制电路断言以接通电荷泵电路。 当电荷泵电路接通时，电荷泵电路产生输出电压。 输出电压从初始值上升到期望的目标值。 在升压过程中，斜坡率调节电路监视输出电压，并确保斜坡率不超过所需的最大值。 电容器可以以期望的斜率充电以用作时变参考电压。 一旦加速过程完成，可以使用反馈电路将输出电压维持在期望的目标值。

公开(公告)号：US07859301B2

公开(公告)日：2010-12-28

申请号：US11799228

申请日：2007-04-30

申请人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

发明人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

IPC分类号： H03K19/173 ,  G05F1/573 ,  G11C16/06

CPC分类号： H03K19/0013 ,  G11C5/147 ,  H03K19/1776 ,  H03K19/17792

摘要： Power regulator circuitry for programmable memory elements on programmable logic device integrated circuits is provided. The programmable memory elements may each include a storage element formed from cross-coupled inverters and an address transistor. Address drivers may be used to supply address signals to the address transistors. The power regulator circuitry may include an address power supply circuit that produces a time-varying address power supply voltage to the address drivers and storage element power supply circuits that provide time-varying storage element power supply voltages to the cross-coupled inverters in the storage elements. Unity gain buffers may be used to distribute a reference voltage from a bandgap voltage reference to the power supply circuits. The power supply circuits may use voltage dividers and p-channel metal-oxide-semiconductor control transistors.

摘要翻译： 提供了可编程逻辑器件集成电路上可编程存储器元件的功率调节器电路。 可编程存储器元件可各自包括由交叉耦合的反相器和地址晶体管形成的存储元件。 地址驱动器可用于向地址晶体管提供地址信号。 功率调节器电路可以包括地址电源电路，其向地址驱动器和存储元件电源电路产生时变地址电源电压，所述地址驱动器和存储元件电源电路向存储器中的交叉耦合的反相器提供时变存储元件电源电压 元素。 单位增益缓冲器可以用于将带隙电压基准的参考电压分配给电源电路。 电源电路可以使用分压器和p沟道金属氧化物半导体控制晶体管。

公开(公告)号：US08493043B2

公开(公告)日：2013-07-23

申请号：US12766622

申请日：2010-04-23

申请人： Thien Le ,  Ping-Chen Liu

发明人： Thien Le ,  Ping-Chen Liu

IPC分类号： G05F1/00

CPC分类号： G05F1/575

摘要： Voltage regulator circuitry is provided. The voltage regulator circuitry may contain a drive transistor that is controlled by the output of an operational amplifier. The drive transistor may supply a regulated voltage to a load. The operational amplifier may compare a reference voltage and a feedback signal at its inputs. The operational amplifier may include first and second stages. An adjustable resistor may be provided between the first and second stages. Control circuitry may control the resistance of the adjustable resistor based on the amount of current flowing through the load to ensure stable operation of the voltage regulator circuitry. Overshoot and undershoot detection and compensation circuitry may compensate for overshoot and undershoot in the regulated voltage. Voltage ramp control circuitry may be used to control the ramp rate of the regulated voltage.

摘要翻译： 提供稳压电路。 电压调节器电路可以包含由运算放大器的输出控制的驱动晶体管。 驱动晶体管可以向负载提供调节电压。 运算放大器可以在其输入端比较参考电压和反馈信号。 运算放大器可以包括第一和第二级。 可以在第一和第二级之间设置可调电阻器。 控制电路可以基于流过负载的电流量来控制可调电阻器的电阻，以确保稳压器电路的稳定运行。 过冲和下冲检测和补偿电路可能会补偿调节电压中的过冲和下冲。 电压斜坡控制电路可用于控制调节电压的斜坡率。

公开(公告)号：US20080265855A1

公开(公告)日：2008-10-30

申请号：US11799228

申请日：2007-04-30

申请人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

发明人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

IPC分类号： G05F1/00

CPC分类号： H03K19/0013 ,  G11C5/147 ,  H03K19/1776 ,  H03K19/17792

摘要： Power regulator circuitry for programmable memory elements on programmable logic device integrated circuits is provided. The programmable memory elements may each include a storage element formed from cross-coupled inverters and an address transistor. Address drivers may be used to supply address signals to the address transistors. The power regulator circuitry may include an address power supply circuit that produces a time-varying address power supply voltage to the address drivers and storage element power supply circuits that provide time-varying storage element power supply voltages to the cross-coupled inverters in the storage elements. Unity gain buffers may be used to distribute a reference voltage from a bandgap voltage reference to the power supply circuits. The power supply circuits may use voltage dividers and p-channel metal-oxide-semiconductor control transistors.

摘要翻译： 提供了可编程逻辑器件集成电路上可编程存储器元件的功率调节器电路。 可编程存储器元件可各自包括由交叉耦合的反相器和地址晶体管形成的存储元件。 地址驱动器可用于向地址晶体管提供地址信号。 功率调节器电路可以包括地址电源电路，其向地址驱动器和存储元件电源电路产生时变地址电源电压，所述地址驱动器和存储元件电源电路向存储器中的交叉耦合的反相器提供时变存储元件电源电压 元素。 单位增益缓冲器可以用于将带隙电压基准的参考电压分配给电源电路。 电源电路可以使用分压器和p沟道金属氧化物半导体控制晶体管。

公开(公告)号：US08085063B2

公开(公告)日：2011-12-27

申请号：US12950963

申请日：2010-11-19

申请人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

发明人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

IPC分类号： H03K19/173

CPC分类号： H03K19/0013 ,  G11C5/147 ,  H03K19/1776 ,  H03K19/17792

摘要： Power regulator circuitry for programmable memory elements on programmable logic device integrated circuits is provided. The programmable memory elements may each include a storage element formed from cross-coupled inverters and an address transistor. Address drivers may be used to supply address signals to the address transistors. The power regulator circuitry may include an address power supply circuit that produces a time-varying address power supply voltage to the address drivers and storage element power supply circuits that provide time-varying storage element power supply voltages to the cross-coupled inverters in the storage elements. Unity gain buffers may be used to distribute a reference voltage from a bandgap voltage reference to the power supply circuits. The power supply circuits may use voltage dividers and p-channel metal-oxide-semiconductor control transistors.

摘要翻译： 提供了可编程逻辑器件集成电路上可编程存储器元件的功率调节器电路。 可编程存储器元件可各自包括由交叉耦合的反相器和地址晶体管形成的存储元件。 地址驱动器可用于向地址晶体管提供地址信号。 功率调节器电路可以包括地址电源电路，其向地址驱动器和存储元件电源电路产生时变地址电源电压，所述地址驱动器和存储元件电源电路向存储器中的交叉耦合的反相器提供时变存储元件电源电压 元素。 单位增益缓冲器可以用于将带隙电压基准的参考电压分配给电源电路。 电源电路可以使用分压器和p沟道金属氧化物半导体控制晶体管。

公开(公告)号：US20110062988A1

公开(公告)日：2011-03-17

申请号：US12950963

申请日：2010-11-19

申请人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

发明人： William Bradley Vest ,  Ping-Chen Liu ,  Thien Le

IPC分类号： H03K19/177

CPC分类号： H03K19/0013 ,  G11C5/147 ,  H03K19/1776 ,  H03K19/17792

摘要： Power regulator circuitry for programmable memory elements on programmable logic device integrated circuits is provided. The programmable memory elements may each include a storage element formed from cross-coupled inverters and an address transistor. Address drivers may be used to supply address signals to the address transistors. The power regulator circuitry may include an address power supply circuit that produces a time-varying address power supply voltage to the address drivers and storage element power supply circuits that provide time-varying storage element power supply voltages to the cross-coupled inverters in the storage elements. Unity gain buffers may be used to distribute a reference voltage from a bandgap voltage reference to the power supply circuits. The power supply circuits may use voltage dividers and p-channel metal-oxide-semiconductor control transistors.

摘要翻译： 提供了可编程逻辑器件集成电路上可编程存储器元件的功率调节器电路。 可编程存储器元件可各自包括由交叉耦合的反相器和地址晶体管形成的存储元件。 地址驱动器可用于向地址晶体管提供地址信号。 功率调节器电路可以包括地址电源电路，其向地址驱动器和存储元件电源电路产生时变地址电源电压，所述地址驱动器和存储元件电源电路向存储器中的交叉耦合的反相器提供时变存储元件电源电压 元素。 单位增益缓冲器可以用于将带隙电压基准的参考电压分配给电源电路。 电源电路可以使用分压器和p沟道金属氧化物半导体控制晶体管。

公开(公告)号：US20100201332A1

公开(公告)日：2010-08-12

申请号：US12766622

申请日：2010-04-23

申请人： Thien Le ,  Ping-Chen Liu

发明人： Thien Le ,  Ping-Chen Liu

IPC分类号： G05F1/575

CPC分类号： G05F1/575

摘要： Voltage regulator circuitry is provided. The voltage regulator circuitry may contain a drive transistor that is controlled by the output of an operational amplifier. The drive transistor may supply a regulated voltage to a load. The operational amplifier may compare a reference voltage and a feedback signal at its inputs. The operational amplifier may include first and second stages. An adjustable resistor may be provided between the first and second stages. Control circuitry may control the resistance of the adjustable resistor based on the amount of current flowing through the load to ensure stable operation of the voltage regulator circuitry. Overshoot and undershoot detection and compensation circuitry may compensate for overshoot and undershoot in the regulated voltage. Voltage ramp control circuitry may be used to control the ramp rate of the regulated voltage.

摘要翻译： 提供稳压电路。 电压调节器电路可以包含由运算放大器的输出控制的驱动晶体管。 驱动晶体管可以向负载提供调节电压。 运算放大器可以在其输入端比较参考电压和反馈信号。 运算放大器可以包括第一和第二级。 可以在第一和第二级之间设置可调电阻器。 控制电路可以基于流过负载的电流量来控制可调电阻器的电阻，以确保稳压器电路的稳定运行。 过冲和下冲检测和补偿电路可能会补偿调节电压中的过冲和下冲。 电压斜坡控制电路可用于控制调节电压的斜坡率。

公开(公告)号：US07728569B1

公开(公告)日：2010-06-01

申请号：US11786312

申请日：2007-04-10

申请人： Thien Le ,  Ping-Chen Liu

发明人： Thien Le ,  Ping-Chen Liu

IPC分类号： G05F1/00 ,  G05F1/10

CPC分类号： G05F1/575

摘要： Voltage regulator circuitry is provided. The voltage regulator circuitry may contain a drive transistor that is controlled by the output of an operational amplifier. The drive transistor may supply a regulated voltage to a load. The operational amplifier may compare a reference voltage and a feedback signal at its inputs. The operational amplifier may include first and second stages. An adjustable resistor may be provided between the first and second stages. Control circuitry may control the resistance of the adjustable resistor based on the amount of current flowing through the load to ensure stable operation of the voltage regulator circuitry. Overshoot and undershoot detection and compensation circuitry may compensate for overshoot and undershoot in the regulated voltage. Voltage ramp control circuitry may be used to control the ramp rate of the regulated voltage.

摘要翻译： 提供稳压电路。 电压调节器电路可以包含由运算放大器的输出控制的驱动晶体管。 驱动晶体管可以向负载提供调节电压。 运算放大器可以在其输入端比较参考电压和反馈信号。 运算放大器可以包括第一和第二级。 可以在第一和第二级之间设置可调电阻器。 控制电路可以基于流过负载的电流量来控制可调电阻器的电阻，以确保稳压器电路的稳定运行。 过冲和下冲检测和补偿电路可能会补偿调节电压中的过冲和下冲。 电压斜坡控制电路可用于控制调节电压的斜坡率。

公开(公告)号：US09035641B1

公开(公告)日：2015-05-19

申请号：US13154149

申请日：2011-06-06

申请人： Thien Le ,  Ping-Chen Liu

发明人： Thien Le ,  Ping-Chen Liu

IPC分类号： G05F3/20 ,  H01F38/32 ,  G05F3/16 ,  G05F3/08 ,  G05F3/04

CPC分类号： H01F38/32 ,  G05F1/468 ,  G05F3/04 ,  G05F3/08 ,  G05F3/16

摘要： A startup circuit to ensure a bandgap reference circuit reliably starts up or recovers from a noise disturbance is provided. The startup circuit incorporates a pull down resistor to detect the bandgap reference circuit being in a disabled state. The startup circuit creates a positive feedback loop to force the bandgap reference circuit out of a disabled state. Consequently, whenever the power supply for the bandgap reference circuit sags or if bandgap output collapses, the output of the bandgap circuit reliably ramps back up to the expected level.

摘要翻译： 提供了确保带隙参考电路可靠地从噪声干扰启动或恢复的启动电路。 启动电路包含一个下拉电阻，用于检测带隙参考电路处于禁用状态。 启动电路创建一个正反馈回路，以迫使带隙参考电路处于禁用状态。 因此，每当带隙参考电路的电源下降或带隙输出崩溃时，带隙电路的输出可靠地回升到预期的水平。