Abstract:
A method of removing contaminant particles from faceplates in newly fabricated field emission displays so that a uniform distribution of contaminants is achieved at the emitter sites of the display. During the initial operation of a field emission dislay device contaminants are removed from the display faceplate by electron induced desorption. The emission current profile at the emitter sites is selected so that the distribution of readsorbed contaminants is equalized. The variations in current emission compensate for shadowing effects due to spacer walls to produce a uniform readsorption distribution. The emitter sites may driven using an animated contrast image at a constant current for the display.
Abstract:
Methods for performing cathode burn-in with respect to an FED display that avoid display non-uniformities near and around the spacer wall structures. In a first method, the anode is floated or receives a negative voltage with respect to the electron emitter. A positive voltage is then applied to the focus waffle structure with respect to the electron emitter. The cathode is then energized thereby preventing emitted electrons from escaping the focus well. Under these conditions, cathode burn-in conditioning can occur but electrons are energetically forbidden from hitting the anode or the spacer walls except for a small region near the focus waffle. Under the second method, the anode is grounded or allowed to float. A negative bias is applied to the focus waffle. This causes electrons to be collected at the M2 layer of the gate. Electrons are energetically forbidden from hitting any portion of the tube except the M2 layer. Under either method, no electrons hit the spacer walls and therefore display non-uniformities near and around the spacer wall structures are avoided.
Abstract:
A circuit and method for turning-on and turning-off elements of an field emission display (FED) device to protect against emitter electrode and gate electrode degradation. The circuit includes control logic having a sequencer which in one embodiment can be realized using a state machine. Upon power-on, the control logic sends an enable signal to a high voltage power supply that supplies voltage to the anode electrode. At this time a low voltage power supply and driving circuitry are disabled. Upon receiving a confirmation signal from the high voltage power supply, the control logic enables the low voltage power supply which supplies voltage to the driving circuitry. Upon receiving a confirmation signal from the low voltage power supply, or optionally after expiration of a predetermined time period, the control logic then enables the driving circuitry which drives the gate electrodes and the emitter electrodes which make up the rows and columns of the FED device. Upon power down, the control logic first disables the low voltage power supply, then the high voltage power supply. The above may occur upon each time the FED is powered-on and powered-off during the normal operational use of the display. By so doing, embodiments of the present invention reduce emitter electrode and gate electrode degradation by restricting electron emission from the emitter electrode directly to the gate electrode.