公开(公告)号：US20070044002A1

公开(公告)日：2007-02-22

申请号：US11546492

申请日：2006-10-10

申请人： Michael Johnson ,  John Minami ,  Ryo Koyama

发明人： Michael Johnson ,  John Minami ,  Ryo Koyama

IPC分类号： H03M13/00

CPC分类号： H04L12/2859 ,  H04L12/2856 ,  H04L49/90 ,  H04L69/12 ,  H04L69/16 ,  H04L69/161 ,  H04L69/163 ,  H04L69/168 ,  H04L69/22 ,  H04M11/06

摘要： An offload system, method, and computer program product are provided for utilizing a hardware network interface for identifying data and calculating at least a portion of a cyclical redundancy check (CRC) value for the data.

摘要翻译： 提供卸载系统，方法和计算机程序产品，用于利用硬件网络接口来识别数据并计算数据的循环冗余校验（CRC）值的至少一部分。

公开(公告)号：US6034963A

公开(公告)日：2000-03-07

申请号：US742085

申请日：1996-10-31

申请人： John Shigeto Minami ,  Ryo Koyama ,  Michael Ward Johnson ,  Masaru Shinohara ,  Thomas C. Poff ,  Daniel F. Burkes

发明人： John Shigeto Minami ,  Ryo Koyama ,  Michael Ward Johnson ,  Masaru Shinohara ,  Thomas C. Poff ,  Daniel F. Burkes

IPC分类号： H04L12/28 ,  H04L12/56 ,  H04L29/06 ,  H04L29/08 ,  G06F13/00 ,  G06F15/16

CPC分类号： H04L12/5693 ,  H04L47/6225 ,  H04L47/623 ,  H04L49/90 ,  H04L49/901 ,  H04L69/12 ,  H04L69/16 ,  H04L69/161 ,  H04L69/32

摘要： A multiple network protocol encoder/decoder comprising a network protocol layer, data handler, O.S. State machine, and memory manager state machines implemented at a hardware gate level. Network packets are received from a physical transport level mechanism by the network protocol layer state machine which decodes network protocols such as TCP, IP, User Datagram Protocol (UDP), PPP, and Raw Socket concurrently as each byte is received. Each protocol handler parses and strips header information immediately from the packet, requiring no intermediate memory. The resulting data are passed to the data handler which consists of data state machines that decode data formats such as email, graphics, Hypertext Transfer Protocol (HTTP), Java, and Hypertext Markup Language (HTML). Each data state machine reacts accordingly to the pertinent data, and any data that are required by more than one data state machine is provided to each state machine concurrently, and any data required more than once by a specific data state machine, are placed in a specific memory location with a pointer designating such data (thereby ensuring minimal memory usage). Resulting display data are immediately passed to a display controller. Any outgoing network packets are created by the data state machines and passed through the network protocol state machine which adds header information and forwards the resulting network packet via a transport level mechanism.

摘要翻译： 一种多网络协议编码器/解码器，包括网络协议层，数据处理器，O.S. 状态机和内存管理器状态机在硬件门级实现。 网络协议层状态机通过网络协议层状态机从物理传输层次机制接收网络数据包，该协议层状态机在收到每个字节时同时解码诸如TCP，IP，用户数据报协议（UDP），PPP和Raw Socket之类的网络协议。 每个协议处理程序从数据包中分析和剥离标题信息，不需要中间存储器。 生成的数据被传递给数据处理程序，数据处理程序由解码数据格式（如电子邮件，图形，超文本传输​​协议（HTTP）），Java和超文本标记语言（HTML）等数据状态机组成。 每个数据状态机对相关数据做出相应的反应，同时向每个状态机提供由多个数据状态机所需的任何数据，并且由特定数据状态机多次需要的任何数据被放置在 具有指定这种数据的指针（从而确保最小的内存使用）的特定存储器位置。 结果显示数据立即传递到显示控制器。 任何传出的网络数据包都是由数据状态机创建的，并通过网络协议状态机，通过传输级别机制来增加报头信息，并转发所产生的网络数据包。

公开(公告)号：US5491498A

公开(公告)日：1996-02-13

申请号：US152624

申请日：1993-11-15

申请人： Ryo Koyama ,  Niall M. Bartlett

发明人： Ryo Koyama ,  Niall M. Bartlett

IPC分类号： G09G5/395 ,  H04N5/60 ,  G09G1/14

CPC分类号： H04N5/602 ,  G09G5/395

摘要： An graphics/audio controller system supports the delivery of digital audio signals in a graphics controller architecture so that much of the video circuitry can also be used to process audio information. The graphics/audio controller may be implemented to accommodate either asynchronous or synchronous audio access. A memory control unit is incorporated to receive audio and video data request signals and to correspondingly access the required data from a memory section. Digital audio and video signals are provided at an output bus of the memory section and are converted to analog signals by one or more digital to analog converters. As a result of the graphics/audio controller system, efficient audio reproduction is supported while minimizing hardware requirements. In addition, the overall size and cost of the system is minimized.

摘要翻译： 图形/音频控制器系统支持以图形控制器架构传送数字音频信号，使得许多视频电路也可用于处理音频信息。 可以实现图形/音频控制器以适应异步或同步音频访问。 并入存储器控制单元以接收音频和视频数据请求信号并相应地从存储器部分访问所需数据。 数字音频和视频信号被提供在存储器部分的输出总线处，并被一个或多个数模转换器转换成模拟信号。 作为图形/音频控制器系统的结果，支持高效的音频再现，同时最小化硬件要求。 此外，系统的总体尺寸和成本最小化。