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19 条记录 (耗时 0.028 秒)

    Offload system, method, and computer program product for processing network communications associated with a plurality of ports
    2.
    发明授权
    Offload system, method, and computer program product for processing network communications associated with a plurality of ports 有权
    卸载系统，方法和用于处理与多个端口相关联的网络通信的计算机程序产品

    公开(公告)号：US08059680B2

    公开(公告)日：2011-11-15

    申请号：US11546031

    申请日：2006-10-10

    申请人： John Shigeto Minami ,  Michael Ward Johnson

    发明人： John Shigeto Minami ,  Michael Ward Johnson

    IPC分类号： H04J3/16

    CPC分类号： H04L12/2602 ,  H04L29/06 ,  H04L43/00 ,  H04L69/12 ,  H04L69/18 ,  H04L69/22

    摘要： An offload system, method, and computer program product are provided for handling transport layer processing of a connection between a local host and a remote host via at least one network. A network interface associated with the local host is utilized for such purpose. A plurality of ports allow communication between the local host and the at least one network. The communications corresponding with the connection are monitored and the connection is associated with at least one port. At least one of the ports receiving the communications corresponding with the connection are identified.

    摘要翻译： 提供卸载系统，方法和计算机程序产品，用于经由至少一个网络来处理本地主机和远程主机之间的连接的传输层处理。 与本地主机相关联的网络接口用于此目的。 多个端口允许本地主机与至少一个网络之间的通信。 监视与连接相对应的通信，并且连接与至少一个端口相关联。 识别接收与连接相对应的通信的端口中的至少一个。

    Sequence tagging system and method for transport offload engine data lists
    5.
    发明授权
    Sequence tagging system and method for transport offload engine data lists 有权
    序列标签系统和传输卸载引擎数据列表的方法

    公开(公告)号：US07624198B1

    公开(公告)日：2009-11-24

    申请号：US10741128

    申请日：2003-12-19

    申请人： Michael Ward Johnson ,  Andrew Currid ,  Mrudula Kanuri ,  John Shigeto Minami

    发明人： Michael Ward Johnson ,  Andrew Currid ,  Mrudula Kanuri ,  John Shigeto Minami

    IPC分类号： G06F15/16

    CPC分类号： G06F15/16 ,  H04L49/9015

    摘要： A system and method are provided for communicating data in a network utilizing a transport offload engine. Included is a data list object that describes how data communicated in a network is to be stored (i.e. placed, etc.) in memory (i.e. application memory). Stored in association (i.e. located, kept together, etc.) with the data list object is a sequence object. Such sequence object identifies a sequence space associated with the data to be stored using the data list object. To this end, the sequence object is used by a transport offload engine to determine whether or not incoming data is to be stored using the data list object.

    摘要翻译： 提供了一种用于使用传输卸载引擎在网络中传送数据的系统和方法。 包括的数据列表对象描述了如何在网络中传送的数据（即放置等）存储在存储器（即应用存储器）中。 与数据列表对象相关联（即定位，保持在一起等）是序列对象。 这种序列对象使用数据列表对象来识别与要存储的数据相关联的序列空间。 为此，传输卸载引擎使用序列对象来确定使用数据列表对象是否存储传入数据。

    Gigabit ethernet adapter
    8.
    发明授权
    Gigabit ethernet adapter 有权
    千兆以太网适配器

    公开(公告)号：US08218555B2

    公开(公告)日：2012-07-10

    申请号：US10131118

    申请日：2002-04-23

    申请人： John Shigeto Minami ,  Robin Yasu Uyeshiro ,  Michael Ward Johnson ,  Steve Su

    发明人： John Shigeto Minami ,  Robin Yasu Uyeshiro ,  Michael Ward Johnson ,  Steve Su

    IPC分类号： H04L12/66 ,  G06F13/00 ,  G06F15/16

    CPC分类号： H04L29/06 ,  H04L47/12 ,  H04L47/27 ,  H04L47/283 ,  H04L47/34 ,  H04L47/6275 ,  H04L67/04 ,  H04L69/08 ,  H04L69/16 ,  H04L69/161 ,  H04L69/162 ,  H04L69/163 ,  H04L69/165 ,  H04L69/166 ,  H04L69/18

    摘要： A gigabit Ethernet adapter provides a provides a low-cost, low-power, easily manufacturable, small form-factor network access module which has a low memory demand and provides a highly efficient protocol decode. The invention comprises a hardware-integrated system that both decodes multiple network protocols in a byte-streaming manner concurrently and processes packet data in one pass, thereby reducing system memory and form factor requirements, while also eliminating software CPU overhead. A preferred embodiment of the invention comprises a plurality of protocol state machines that decode network protocols such as TCP, IP, User Datagram Protocol (UDP), PPP, Raw Socket, RARP, ICMP, IGMP, iSCSI, RDMA, and FCIP concurrently as each byte is received. Each protocol handler parses, interprets, and strips header information immediately from the packet, requiring no intermediate memory. The invention provides an Internet tuner core, peripherals, and external interfaces. A network stack processes, generates and receives network packets. An internal programmable processor controls the network stack and handles any other types of ICMP packets, IGMP packets, or packets corresponding to other protocols not supported directly by dedicated hardware. A virtual memory manager is implemented in optimized, hardwired logic. The virtual memory manager allows the use of a virtual number of network connections which is limited only by the amount of internal and external memory available.

    摘要翻译： 千兆以太网适配器提供了一种低成本，低功耗，易于制造的小尺寸网络访问模块，其具有低内存需求并提供高效协议解码。 本发明包括硬件集成系统，它同时以字节流方式解码多个网络协议，并一次处理分组数据，从而减少系统内存和外形要求，同时也消除了软件CPU开销。 本发明的优选实施例包括多个协议状态机，每个协议状态机同时解码诸如TCP，IP，用户数据报协议（UDP），PPP，原始套接字，RARP，ICMP，IGMP，iSCSI，RDMA和FCIP之类的网络协议 接收字节。 每个协议处理程序从数据包中立即解析，解释和剥离标题信息，不需要中间存储器。 本发明提供一种因特网调谐器核心，外围设备和外部接口。 网络堆栈处理，生成和接收网络数据包。 内部可编程处理器控制网络堆栈，并处理任何其他类型的ICMP数据包，IGMP数据包或与其他协议相对应的数据包，这些协议不会被专用硬件直接支持。 虚拟内存管理器在优化的硬连线逻辑中实现。 虚拟内存管理器允许使用虚拟数量的网络连接，这些网络连接仅受内部和外部可用内存量的限制。

    Communications processor
    10.
    发明授权
    Communications processor 有权
    通讯处理器

    公开(公告)号：US07379475B2

    公开(公告)日：2008-05-27

    申请号：US10470365

    申请日：2002-01-25

    申请人： John Shigeto Minami ,  Michael Ward Johnson

    发明人： John Shigeto Minami ,  Michael Ward Johnson

    IPC分类号： H04J3/16 ,  H04J3/22 ,  H04J3/24 ,  G06F15/16

    CPC分类号： H04L12/2602 ,  H04L29/06 ,  H04L43/00 ,  H04L69/12 ,  H04L69/18 ,  H04L69/22

    摘要： A communication processor of a class, such as an Internet tuner, provides such desirable features (FIG. 2) as LAN support, an SPI interface (128), a dedicated port (56), and ADPCM (22) for audio applications. The invention provides a low-cost, low-power, easily manufactured, small form-factor network access module which has a low memory demand and provides a highly efficient protocol decode. The invention comprises a hardware-integrated system that both decodes multiple network protocols in a streaming manner concurrently and processes packet data in one pass, thereby reducing system memory and form factor requirements, while also eliminating software CPU overhead.

    摘要翻译： 诸如因特网调谐器的类的通信处理器提供诸如LAN支持的这样的期望特征（图2），用于音频应用的SPI接口（128），专用端口（56）和ADPCM（22）。 本发明提供了一种低成本，低功耗，易于制造的小尺寸网络访问模块，其具有低存储器需求并提供高效协议解码。 本发明包括一个硬件集成系统，它同时以流式解码多个网络协议，一次处理分组数据，从而减少系统内存和外形要求，同时也消除了软件CPU开销。