Apparatus and method for implementing common public radio interface negotiation state machine

    公开(公告)号:US09990226B2

    公开(公告)日:2018-06-05

    申请号:US14673443

    申请日:2015-03-30

    发明人: Zheng Song Jian Yu

    摘要: An apparatus and a method for implementing a common public radio interface (CPRI) negotiation state machine. The apparatus includes an application-specific integrated circuit (ASIC) chip and a system on chip (SOC), where the ASIC chip is configured to send an interrupt request to the SOC in condition that n transition paths of m transition paths of the CPRI negotiation state machine need to be processed by the SOC; the SOC is configured to execute the software code according to the interrupt request to generate interrupt configuration information, and send the interrupt configuration information to the ASIC chip, where the interrupt configuration information is used to indicate whether the CPRI negotiation state machine transits to a state pointed by the n transition paths; and the ASIC chip is further configured to control transition of the CPRI negotiation state machine according to the interrupt configuration information.

    Method and apparatus for parallel and conditional data manipulation in a software-defined network processing engine

    公开(公告)号:US09880844B2

    公开(公告)日:2018-01-30

    申请号:US14144260

    申请日:2013-12-30

    申请人: CAVIUM, INC.

    IPC分类号: G06F9/30 H04L29/06 G06F15/76

    摘要: Embodiments of the present invention relate to fast and conditional data modification and generation in a software-defined network (SDN) processing engine. Modification of multiple inputs and generation of multiple outputs can be performed in parallel. A size of each input or output data can be large, such as in hundreds of bytes. The processing engine includes a control path and a data path. The control path generates instructions for modifying inputs and generating new outputs. The data path executes all instructions produced by the control path. The processing engine is typically programmable such that conditions and rules for data modification and generation can be reconfigured depending on network features and protocols supported by the processing engine. The SDN processing engine allows for processing multiple large-size data flows and is efficient in manipulating such data. The SDN processing engine achieves full throughput with multiple back-to-back input and output data flows.

    Wireless communication apparatus and wireless communication method

    公开(公告)号:US09867123B2

    公开(公告)日:2018-01-09

    申请号:US14976158

    申请日:2015-12-21

    发明人: Akio Hashizume

    摘要: A data processor is configured to perform first processing to acquire data that is included in reception signals received by an antenna and is transmitted in accordance with a first wireless communication scheme and second processing to acquire data that is included in the reception signals and is transmitted in accordance with a second wireless communication scheme. The data processor has, as an operating mode, a first operating mode and a second operating mode. The first operating mode is a mode in which, when the first processing is performed, the second processing is intermittently performed in place of the first processing. The second operating mode is a mode in which, when the first processing is performed, the second processing is intermittently performed in place of the first processing at intervals longer than intervals in the first operating mode.

    Task offload to a peripheral device

    公开(公告)号:US09858214B2

    公开(公告)日:2018-01-02

    申请号:US13896132

    申请日:2013-05-16

    IPC分类号: G06F13/14 H04L29/06 H04L29/08

    摘要: In one embodiment, to determine what tasks may be offloaded to a peripheral hardware device (e.g., to be performed in hardware on the peripheral device, rather than on the CPU(s) of the host computer), an indication from the at least one peripheral hardware device may be provided, without the peripheral hardware device first being queried to determine the task offload capabilities provided by the peripheral hardware device. In one embodiment, a large packet that includes a plurality of extension headers may be offloaded to the peripheral hardware device for segmentation. An indication of the offset where the extension headers end may be provided in connection with the large packet. In another embodiment, a packet with extension headers that come before an encryption header in the packet are not offloaded to peripheral hardware device for encryption, while packets with no extension headers before the encryption header may be offloaded.