公开(公告)号：US07875935B2

公开(公告)日：2011-01-25

申请号：US12310774

申请日：2007-06-04

申请人： Kenzo Manabe

发明人： Kenzo Manabe

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119 ,  H01L21/8238

CPC分类号： H01L21/823835 ,  H01L21/28097 ,  H01L29/66545

摘要： A semiconductor device includes a silicon substrate; an N-channel field-effect transistor including a first gate insulating film on the silicon substrate, a first gate electrode on the first gate insulating film and a first source/drain region; and a P-channel field-effect transistor including a second gate insulating film on the silicon substrate, a second gate electrode on the second gate insulating film and a second source/drain region. Each of the first and second gate electrodes includes a crystallized nickel silicide region containing an impurity element, the crystallized nickel silicide region being contact with the first or second gate insulating film, and a barrier layer region in an upper portion including an upper surface of the gate electrode, the barrier layer region containing an Ni diffusion-preventing element higher in concentration than that of a lower portion below the upper portion.

摘要翻译： 半导体器件包括硅衬底; N沟道场效应晶体管，其包括在硅衬底上的第一栅极绝缘膜，第一栅极绝缘膜上的第一栅极电极和第一源极/漏极区域; 以及P沟道场效应晶体管，其包括硅衬底上的第二栅极绝缘膜，第二栅极绝缘膜上的第二栅极电极和第二源极/漏极区域。 第一和第二栅电极中的每一个包括含有杂质元素的结晶的硅化镍区域，结晶的镍硅化物区域与第一或第二栅极绝缘膜接触，并且在上部的阻挡层区域包括上表面 栅电极，阻挡层区域含有比上部下方的下部更高浓度的Ni扩散防止元件。

公开(公告)号：US20090321839A1

公开(公告)日：2009-12-31

申请号：US12310774

申请日：2007-06-04

申请人： Kenzo Manabe

发明人： Kenzo Manabe

IPC分类号： H01L27/092 ,  H01L21/8238

CPC分类号： H01L21/823835 ,  H01L21/28097 ,  H01L29/66545

摘要： A semiconductor device includes a silicon substrate; an N-channel field-effect transistor including a first gate insulating film on the silicon substrate, a first gate electrode on the first gate insulating film and a first source/drain region; and a P-channel field-effect transistor including a second gate insulating film on the silicon substrate, a second gate electrode on the second gate insulating film and a second source/drain region. Each of the first and second gate electrodes includes a crystallized nickel silicide region containing an impurity element, the crystallized nickel silicide region being contact with the first or second gate insulating film, and a barrier layer region in an upper portion including an upper surface of the gate electrode, the barrier layer region containing an Ni diffusion-preventing element higher in concentration than that of a lower portion below the upper portion.

摘要翻译： 半导体器件包括硅衬底; N沟道场效应晶体管，其包括在硅衬底上的第一栅极绝缘膜，第一栅极绝缘膜上的第一栅极电极和第一源极/漏极区域; 以及P沟道场效应晶体管，其包括硅衬底上的第二栅极绝缘膜，第二栅极绝缘膜上的第二栅极电极和第二源极/漏极区域。 第一和第二栅电极中的每一个包括含有杂质元素的结晶的硅化镍区域，结晶的镍硅化物区域与第一或第二栅极绝缘膜接触，并且在上部的阻挡层区域包括上表面 栅电极，阻挡层区域含有比上部下方的下部更高浓度的Ni扩散防止元件。

公开(公告)号：US07592674B2

公开(公告)日：2009-09-22

申请号：US10575785

申请日：2005-06-21

申请人： Kensuke Takahashi ,  Kenzo Manabe ,  Nobuyuki Ikarashi ,  Toru Tatsumi

发明人： Kensuke Takahashi ,  Kenzo Manabe ,  Nobuyuki Ikarashi ,  Toru Tatsumi

IPC分类号： H01L29/78 ,  H01L21/8234 ,  H01L21/8238

CPC分类号： H01L29/4975 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/66545

摘要： There is provided a semiconductor device which is capable of solving a problem of threshold control in CMOS transistor, accompanied with combination of a gate insulating film having a high dielectric constant and a metal gate electrode, and significantly enhancing performances without deterioration in reliability of a device. The semiconductor device includes a gate insulating film composed of a material having a high dielectric constant, and a gate electrode. A portion of the gate electrode making contact with the gate insulating film has a composition including silicide of metal M expressed with MxSi1-X (0 0.5) in a p-type MOSFET, and is equal to or smaller than 0.5 (X≦0.5) in a n-type MOSFET.

摘要翻译： 提供一种半导体器件，其能够解决CMOS晶体管中的阈值控制的问题，伴随着具有高介电常数的栅极绝缘膜和金属栅极电极的组合，并且显着提高性能而不劣化器件的可靠性 。 半导体器件包括由具有高介电常数的材料构成的栅极绝缘膜和栅电极。 与栅极绝缘膜接触的栅电极的一部分具有由MxSi1-X（0 0.5），并且在n型MOSFET中等于或小于0.5（X <= 0.5）。

公开(公告)号：US20090170252A1

公开(公告)日：2009-07-02

申请号：US12227714

申请日：2007-05-21

申请人： Takashi Nakagawa ,  Toru Tatsumi ,  Makiko Oshida ,  Nobuyuki Ikarashi ,  Kensuke Takahashi ,  Kenzo Manabe

发明人： Takashi Nakagawa ,  Toru Tatsumi ,  Makiko Oshida ,  Nobuyuki Ikarashi ,  Kensuke Takahashi ,  Kenzo Manabe

IPC分类号： H01L21/8234 ,  B05C11/00 ,  H01L21/285

CPC分类号： H01L21/28518 ,  H01L21/28052 ,  H01L21/28097 ,  H01L29/665

摘要： A formation method of a metallic compound layer includes preparing, in a chamber, a substrate having a surface on which a semiconductor material of silicon, germanium, or silicon germanium is exposed, and forming a metallic compound layer, includes: supplying a raw material gas containing a metal for forming a metallic compound with the semiconductor material to the chamber; heating the substrate to a temperature at which the raw material gas is pyrolyzed; and forming a metallic compound layer by reaction of the metal with the semiconductor material so that no layer of the metal is deposited on the substrate. A manufacturing method of a semiconductor device employs this formation method of a metallic compound layer.

摘要翻译： 金属化合物层的形成方法包括在室内制备具有硅，锗或硅锗的半导体材料露出的表面的基板，形成金属化合物层，包括：供给原料气体 含有用于与所述室形成具有所述半导体材料的金属化合物的金属; 将基板加热到原料气体被热解的温度; 以及通过金属与半导体材料的反应形成金属化合物层，使得金属层不沉积在基板上。 半导体器件的制造方法采用这种金属化合物层的形成方法。

公开(公告)号：US20090026550A1

公开(公告)日：2009-01-29

申请号：US12279379

申请日：2006-11-24

申请人： Kenzo Manabe

发明人： Kenzo Manabe

IPC分类号： H01L27/092 ,  H01L21/8238

CPC分类号： H01L21/823814 ,  H01L21/28097 ,  H01L21/823835 ,  H01L29/4975 ,  H01L29/66545

摘要： A semiconductor device includes: a silicon substrate; and a field effect transistor including a gate insulating film over the silicon substrate, a gate electrode on the gate insulating film, and source and drain regions. The gate electrode includes, in part in contact with the gate insulating film, a crystallized Ni silicide region containing an impurity element of a conductivity type opposite to a conductivity type of a channel region in the field effect transistor.

摘要翻译： 半导体器件包括：硅衬底; 以及包括在硅衬底上的栅绝缘膜，栅极绝缘膜上的栅电极以及源极和漏极区的场效应晶体管。 栅电极部分地与栅极绝缘膜接触，包含与场效应晶体管中的沟道区的导电类型相反的导电类型的杂质元素的结晶的Ni硅化物区域。