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公开(公告)号:US20230269075A1
公开(公告)日:2023-08-24
申请号:US17686475
申请日:2022-03-04
Applicant: MELLANOX TECHNOLOGIES, LTD.
IPC: H04L9/08
CPC classification number: H04L9/0819 , H04L9/0852
Abstract: A system comprises a transmitter including first circuitry that generates a first frame of a first type for establishing a quantum-secure link with an endpoint according to a security protocol, a data source that generates a second frame of a second type for communicating data to the endpoint, an output that couples to the endpoint via a first communication channel, and second circuitry. The second circuitry selects either the first frame or the second frame, adds information to the selected frame that identifies the selected frame as being of the first type or the second type to form an output frame, and outputs the output frame to the output.
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公开(公告)号:US20230261860A1
公开(公告)日:2023-08-17
申请号:US18135954
申请日:2023-04-18
Applicant: Mellanox Technologies, Ltd.
Inventor: Elad Mentovich , Itshak Kalifa , Ioannis (Giannis) Patronas , Paraskevas Bakopoulos , Eyal Waldman
CPC classification number: H04L9/0858 , H04B10/70
Abstract: Embodiments are disclosed for a quantum key distribution enabled intra-datacenter network. An example system includes a first vertical cavity surface emitting laser (VCSEL), a second VCSEL and a network interface controller. The first VCSEL is configured to emit a first optical signal associated with data. The second VCSEL is configured to emit a second optical signal associated with quantum key distribution (QKD). Furthermore, the network interface controller is configured to manage transmission of the first optical signal associated with the first VCSEL and the second optical signal associated with the second VCSEL via an optical communication channel coupled to a network interface module.
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公开(公告)号:US20230224262A1
公开(公告)日:2023-07-13
申请号:US17648260
申请日:2022-01-18
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Ioannis (Giannis) Patronas , Michael Gandelman , Liron Mula , Aviad Levy , Lion Levi , Jose Yallouz , Paraskevas Bakopoulos , Elad Mentovich
IPC: H04L49/00 , H04L49/101
CPC classification number: H04L49/3027 , H04L49/101 , H04L49/3018
Abstract: Switches for performing packet switching and associated methods are provided. An example switch includes an ingress port for receiving a packet. The switch includes a plurality of egress ports for discharging the packet from the switch. The switch includes a plurality of egress queues with each egress queue associated with one of the plurality of egress ports. The switch includes a control plane configured to determine a descriptor associated with a packet, determine a first egress port from which to discharge the at least one packet and to transmit the descriptor to an egress queue associated with the first egress port. The switch includes a descriptor crossbar configured to transmit the descriptor from the egress queue to a second egress port of the plurality of egress ports. The switch includes a packet crossbar configured to transmit the at least one packet from the ingress port to the second egress port.
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公开(公告)号:US11570125B2
公开(公告)日:2023-01-31
申请号:US16985634
申请日:2020-08-05
Applicant: Mellanox Technologies, Ltd.
Inventor: Paraskevas Bakopoulos , Ioannis (Giannis) Patronas , Elad Mentovich
IPC: H04L12/933 , H04L49/103 , H04Q11/00 , H04L49/15
Abstract: A fast optical switch and networks comprising fast optical switches are disclosed herein. In an example embodiment, a fast optical switch includes two or more fabric switches; a first selector switch; and a second selector switch. The first selector switch may selectively pass a signal to one of the two or more fabric switches. The one of the two or more fabric switches may act on the received signal to provide a switched signal and the second selector switch may selectively receive the switched signal provided by the one of the two or more fabric switches. A slot of the fast optical switch comprises a transmission window of one of the two or more fabric switches that occurs in parallel with at least a portion of a reconfiguration window of the other of the two or more fabric switches.
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公开(公告)号:US20220329322A1
公开(公告)日:2022-10-13
申请号:US17326770
申请日:2021-05-21
Applicant: Mellanox Technologies LTD.
Inventor: Nikolaos (Nikos) Argyris , Yoav Rosenberg , Dimitrios Kalavrouziotis , Paraskevas Bakopoulos , Elad Mentovich
IPC: H04B10/40 , H04B10/50 , H04B10/112 , H04B10/61
Abstract: A transceiver comprises a transmitter including a light source, a modulator coupled to the light source, a driver that drives the modulator according to a set of driving conditions to cause the modulator to output optical signals based on light from the light source, and an output that passes first portions of the optical signals output by the modulator. The transceiver further comprises a first detector that detects second portions of the optical signals output from the modulator, and a receiver including a second detector that detects optical signals from an external transmitter.
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公开(公告)号:US20220236619A1
公开(公告)日:2022-07-28
申请号:US17617603
申请日:2019-06-10
Inventor: Claudia Hoessbacher , Juerg Leuthold , Elad Mentovich , Paraskevas Bakopoulos , Dimitrios Kalavrouziotis , Dimitrios Tsiokos
Abstract: An optoelectronic device (20) includes thin film structures (56) disposed on a semiconductor substrate (54) and patterned to define components of an integrated drive circuit, which is configured to generate a drive signal. A back end of line (BEOL) stack (42) of alternating metal layers (44, 46) and dielectric layers (50) is disposed over the thin film structures. The metal layers include a modulator layer (48), which contains a plasmonic waveguide (36, 99, 105) and a plurality of electrodes (30, 32, 34, 96, 98, 106), which apply a modulation to surface plasmons polaritons (SPPs) propagating in the plasmonic waveguide in response to the drive signal. A plurality of interconnect layers are patterned to connect the thin film structures to the electrodes. An optical input coupler (38, 82) is configured to couple light into the modulator layer, whereby the light is modulated by the modulation of the SPPs, and an optical output coupler (38, 82) is configured to couple the modulated light out of the modulator layer.
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公开(公告)号:US20220216919A1
公开(公告)日:2022-07-07
申请号:US17608170
申请日:2019-05-13
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Elad Mentovich , Dimitrios Kalavrouziotis , Paraskevas Bakopoulos , Eyal Waldman
IPC: H04B10/524 , G02F1/21 , G02F1/225
Abstract: A multi-chip module (MCM-10) includes a substrate (11), one or more photonic chips (14) disposed on the substrate, and an electronic chip (12) disposed on the substrate. The one or more photonic chips include one or more optical channels (22), which are configured to guide propagating optical signals, and two or more photonic modulator-segments (18) coupled to each of the optical channels, each photonic modulator-segment configured to modulate the propagating optical signals responsively to digitally modulated driving electrical signals provided thereto. The electronic chip is configured to generate the digitally modulated driving electrical signals on multiple different lanes (16) of the electronic chip, synchronize the driving electrical signals on the multiple lanes to a same clock, separately control respective phases of the driving electrical signals, fine-tune the voltages of the driving electrical signals on the multiple lanes, and drive the photonic modulator-segments on the photonic chips with the synchronized and phase-controlled driving electrical signals.
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公开(公告)号:US20220209942A1
公开(公告)日:2022-06-30
申请号:US17155881
申请日:2021-01-22
Applicant: Mellanox Technologies, Ltd.
Inventor: Elad Mentovich , Ioannis Giannis Patronas , Paraskevas Bakopoulos , Ahmad Atamlh
Abstract: Embodiments are disclosed for a quantum key distribution (QKD) enabled intra-datacenter network. An example system includes a first QKD device and a second QKD device. The first QKD device includes a first quantum-enabled port and a first network port. The second QKD device includes a second quantum-enabled port and a second network port. The first quantum-enabled port of the first QKD device is communicatively coupled to the second quantum-enabled port of the second QKD device via a QKD link associated with quantum communication. Furthermore, the first network port of the first QKD device is communicatively coupled to a first network switch via a first classical link associated with classical network communication. The second network port of the second QKD device is communicatively coupled to a second network switch via a second classical link associated with classical network communication.
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公开(公告)号:US11303379B1
公开(公告)日:2022-04-12
申请号:US17160422
申请日:2021-01-28
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Donald Becker , Dimitrios Kalavrouziotis , Boaz Atias , Itshak Kalifa , Tamir Sharkaz , Paraskevas Bakopoulos , Elad Mentovich
IPC: H04J14/02 , H04B10/2581 , H04Q11/00 , H04J14/08
Abstract: A system includes a pair of network devices, a universal multi-core fiber (UMCF) interconnect, and a pair of wavelength-division multiplexing (WDM) devices. Each network device includes (i) first optical communication devices configured to communicate first optical signals having a first carrier wavelength and (ii) second optical communication devices configured to communicate second optical signals having a second carrier wavelength. The universal multi-core fiber (UMCF) interconnect includes multiple cores that are configured to convey the first optical signals and the second optical signals between the network devices, using single-mode propagation for the first optical signals and multi-mode propagation for the second optical signals. Each WDM device is connected between a respective network device and the UMCF interconnect and configured to couple the first and second optical communication devices of the respective network device to the cores in accordance with a defined channel assignment.
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公开(公告)号:US20250038871A1
公开(公告)日:2025-01-30
申请号:US18914324
申请日:2024-10-14
Applicant: Mellanox Technologies, Ltd.
Inventor: Liron Mula , Elad Mentovich , Paraskevas Bakopoulos , Eitan Zahavi , Sagi Kuks
Abstract: A system includes multiple processors to communicate with one another at predefined time slots. A given processor among the processors is to (i) hold a predetermined schedule plan that specifies which of the other processors in the system are accessible to the given processor at which of the time slots, the predetermined schedule plan having been determined before receiving data for transmission from the given processors to the other processors, (ii) queue data that is destined to one or more of the other processors, and (iii) transmit the queued data in accordance with the predetermined schedule plan.
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