PACKET SWITCHES
    23.
    发明公开
    PACKET SWITCHES 审中-公开

    公开(公告)号:US20230224262A1

    公开(公告)日:2023-07-13

    申请号:US17648260

    申请日:2022-01-18

    CPC classification number: H04L49/3027 H04L49/101 H04L49/3018

    Abstract: Switches for performing packet switching and associated methods are provided. An example switch includes an ingress port for receiving a packet. The switch includes a plurality of egress ports for discharging the packet from the switch. The switch includes a plurality of egress queues with each egress queue associated with one of the plurality of egress ports. The switch includes a control plane configured to determine a descriptor associated with a packet, determine a first egress port from which to discharge the at least one packet and to transmit the descriptor to an egress queue associated with the first egress port. The switch includes a descriptor crossbar configured to transmit the descriptor from the egress queue to a second egress port of the plurality of egress ports. The switch includes a packet crossbar configured to transmit the at least one packet from the ingress port to the second egress port.

    Fast optical switch
    24.
    发明授权

    公开(公告)号:US11570125B2

    公开(公告)日:2023-01-31

    申请号:US16985634

    申请日:2020-08-05

    Abstract: A fast optical switch and networks comprising fast optical switches are disclosed herein. In an example embodiment, a fast optical switch includes two or more fabric switches; a first selector switch; and a second selector switch. The first selector switch may selectively pass a signal to one of the two or more fabric switches. The one of the two or more fabric switches may act on the received signal to provide a switched signal and the second selector switch may selectively receive the switched signal provided by the one of the two or more fabric switches. A slot of the fast optical switch comprises a transmission window of one of the two or more fabric switches that occurs in parallel with at least a portion of a reconfiguration window of the other of the two or more fabric switches.

    Integrated plasmonic modulator
    26.
    发明申请

    公开(公告)号:US20220236619A1

    公开(公告)日:2022-07-28

    申请号:US17617603

    申请日:2019-06-10

    Abstract: An optoelectronic device (20) includes thin film structures (56) disposed on a semiconductor substrate (54) and patterned to define components of an integrated drive circuit, which is configured to generate a drive signal. A back end of line (BEOL) stack (42) of alternating metal layers (44, 46) and dielectric layers (50) is disposed over the thin film structures. The metal layers include a modulator layer (48), which contains a plasmonic waveguide (36, 99, 105) and a plurality of electrodes (30, 32, 34, 96, 98, 106), which apply a modulation to surface plasmons polaritons (SPPs) propagating in the plasmonic waveguide in response to the drive signal. A plurality of interconnect layers are patterned to connect the thin film structures to the electrodes. An optical input coupler (38, 82) is configured to couple light into the modulator layer, whereby the light is modulated by the modulation of the SPPs, and an optical output coupler (38, 82) is configured to couple the modulated light out of the modulator layer.

    Consolidating multiple electrical data signals into an optical data signal on a multi-chip module using ASIC for controlling a photonics transceiver

    公开(公告)号:US20220216919A1

    公开(公告)日:2022-07-07

    申请号:US17608170

    申请日:2019-05-13

    Abstract: A multi-chip module (MCM-10) includes a substrate (11), one or more photonic chips (14) disposed on the substrate, and an electronic chip (12) disposed on the substrate. The one or more photonic chips include one or more optical channels (22), which are configured to guide propagating optical signals, and two or more photonic modulator-segments (18) coupled to each of the optical channels, each photonic modulator-segment configured to modulate the propagating optical signals responsively to digitally modulated driving electrical signals provided thereto. The electronic chip is configured to generate the digitally modulated driving electrical signals on multiple different lanes (16) of the electronic chip, synchronize the driving electrical signals on the multiple lanes to a same clock, separately control respective phases of the driving electrical signals, fine-tune the voltages of the driving electrical signals on the multiple lanes, and drive the photonic modulator-segments on the photonic chips with the synchronized and phase-controlled driving electrical signals.

    QUANTUM KEY DISTRIBUTION ENABLED INTRA-DATACENTER NETWORK

    公开(公告)号:US20220209942A1

    公开(公告)日:2022-06-30

    申请号:US17155881

    申请日:2021-01-22

    Abstract: Embodiments are disclosed for a quantum key distribution (QKD) enabled intra-datacenter network. An example system includes a first QKD device and a second QKD device. The first QKD device includes a first quantum-enabled port and a first network port. The second QKD device includes a second quantum-enabled port and a second network port. The first quantum-enabled port of the first QKD device is communicatively coupled to the second quantum-enabled port of the second QKD device via a QKD link associated with quantum communication. Furthermore, the first network port of the first QKD device is communicatively coupled to a first network switch via a first classical link associated with classical network communication. The second network port of the second QKD device is communicatively coupled to a second network switch via a second classical link associated with classical network communication.

    Communication between data centers using a multi-core fiber

    公开(公告)号:US11303379B1

    公开(公告)日:2022-04-12

    申请号:US17160422

    申请日:2021-01-28

    Abstract: A system includes a pair of network devices, a universal multi-core fiber (UMCF) interconnect, and a pair of wavelength-division multiplexing (WDM) devices. Each network device includes (i) first optical communication devices configured to communicate first optical signals having a first carrier wavelength and (ii) second optical communication devices configured to communicate second optical signals having a second carrier wavelength. The universal multi-core fiber (UMCF) interconnect includes multiple cores that are configured to convey the first optical signals and the second optical signals between the network devices, using single-mode propagation for the first optical signals and multi-mode propagation for the second optical signals. Each WDM device is connected between a respective network device and the UMCF interconnect and configured to couple the first and second optical communication devices of the respective network device to the cores in accordance with a defined channel assignment.

    Time division communication between processors

    公开(公告)号:US20250038871A1

    公开(公告)日:2025-01-30

    申请号:US18914324

    申请日:2024-10-14

    Abstract: A system includes multiple processors to communicate with one another at predefined time slots. A given processor among the processors is to (i) hold a predetermined schedule plan that specifies which of the other processors in the system are accessible to the given processor at which of the time slots, the predetermined schedule plan having been determined before receiving data for transmission from the given processors to the other processors, (ii) queue data that is destined to one or more of the other processors, and (iii) transmit the queued data in accordance with the predetermined schedule plan.

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