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公开(公告)号：US07936156B2
公开(公告)日：2011-05-03
申请号：US12136579
申请日：2008-06-10
IPC分类号： G05F1/40
CPC分类号： H02M3/1588 , Y02B70/1466
摘要： A first power supply line and having a first conductivity type a second transistor coupled between the first transistor and a second power supply line, and having the first conductivity type an output unit driving a first control signal causing the first transistor to become conductive, based on a drive voltage, and outputting the first control signal to the first transistor and a boot strap circuit including a capacitor having a first end coupled to a node of the first transistor and the second transistor and supplying the output unit with the drive voltage based on the capacitor, wherein an electric potential of the first end is reduced before the first transistor becomes conductive.
摘要翻译： 第一电源线并具有第一导电类型，第二晶体管耦合在第一晶体管和第二电源线之间，并且具有第一导电类型，驱动第一控制信号使第一晶体管导通的输出单元基于 驱动电压，并且将第一控制信号输出到第一晶体管，以及引导电路，其包括具有耦合到第一晶体管和第二晶体管的节点的第一端的电容器，并且基于该第一晶体管提供驱动电压 电容器，其中在所述第一晶体管导通之前所述第一端的电位减小。
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公开(公告)号：US20080303500A1
公开(公告)日：2008-12-11
申请号：US12136579
申请日：2008-06-10
IPC分类号： G05F1/00
CPC分类号： H02M3/1588 , Y02B70/1466
摘要： A first power supply line and having a first conductivity type a second transistor coupled between the first transistor and a second power supply line, and having the first conductivity type an output unit driving a first control signal causing the first transistor to become conductive, based on a drive voltage, and outputting the first control signal to the first transistor and a boot strap circuit including a capacitor having a first end coupled to a node of the first transistor and the second transistor and supplying the output unit with the drive voltage based on the capacitor, wherein an electric potential of the first end is reduced before the first transistor becomes conductive.
摘要翻译： 第一电源线并具有第一导电类型，第二晶体管耦合在第一晶体管和第二电源线之间，并且具有第一导电类型，驱动第一控制信号使第一晶体管导通的输出单元基于 驱动电压，并且将第一控制信号输出到第一晶体管，以及引导电路，其包括具有耦合到第一晶体管和第二晶体管的节点的第一端的电容器，并且基于该第一晶体管提供驱动电压 电容器，其中在所述第一晶体管导通之前所述第一端的电位减小。
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23.发明授权公开(公告)号：US08203817B2
公开(公告)日：2012-06-19
申请号：US12369907
申请日：2009-02-12
IPC分类号： H02H9/08
摘要： A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.
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24.发明申请POWER SUPPLY CIRCUIT, OVERCURRENT PROTECTION CIRCUIT FOR THE SAME, AND ELECTRONIC DEVICE 有权电源电路，相同的过电流保护电路和电子设备公开(公告)号：US20090201618A1
公开(公告)日：2009-08-13
申请号：US12369907
申请日：2009-02-12
IPC分类号： H02H9/08
CPC分类号： G05F1/573 , H03K17/0822
摘要： A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.
摘要翻译： 电源电路包括：输出晶体管，其包括耦合到电源电压的源极和从其输出输出电压的漏极; 由所述电源电压供电的第一误差放大器，并且基于所述输出电压和参考电压之间的电位差输出信号; 缓冲晶体管，其包括耦合到所述第一误差放大器的输出的栅极，以及经由恒定电流源耦合到所述电源电压并耦合到所述输出晶体管的栅极的源极; 耦合到输出晶体管的电流检测晶体管，使得门和源被共享; 以及过电流保护电路，其被配置为基于电流检测晶体管的漏极电流的增加来限制缓冲晶体管的漏极电流，从而控制输出晶体管的输出电流。
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25.发明授权Power supply circuit, overcurrent protection circuit for the same, and electronic device 有权电源电路，过流保护电路相同，电子设备公开(公告)号：US08233257B2
公开(公告)日：2012-07-31
申请号：US12369907
申请日：2009-02-12
IPC分类号： H02H9/08
CPC分类号： G05F1/573 , H03K17/0822
摘要： A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.
摘要翻译： 电源电路包括：输出晶体管，其包括耦合到电源电压的源极和从其输出输出电压的漏极; 由所述电源电压供电的第一误差放大器，并且基于所述输出电压和参考电压之间的电位差输出信号; 缓冲晶体管，其包括耦合到所述第一误差放大器的输出的栅极，以及经由恒定电流源耦合到所述电源电压并耦合到所述输出晶体管的栅极的源极; 耦合到输出晶体管的电流检测晶体管，使得门和源被共享; 以及过电流保护电路，其被配置为基于电流检测晶体管的漏极电流的增加来限制缓冲晶体管的漏极电流，从而控制输出晶体管的输出电流。
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公开(公告)号：US08406364B2
公开(公告)日：2013-03-26
申请号：US12034348
申请日：2008-02-20
申请人： Morihito Hasegawa
发明人： Morihito Hasegawa
IPC分类号： H03D3/24
CPC分类号： H03L7/1976 , H03L7/193
摘要： In the following B cycles, the second frequency-divided signal fA is maintained at a low level, while the third frequency-divided signal fB is maintained at a high level. The three-modulus prescaler 13 has a frequency division value (M−1) if the pseudo random values are negative values, and a frequency division value (M+1) if the pseudo random values are positive values, in accordance with the signs of the pseudo random values outputted from the ΣΔ modulator 8. After that, the frequency division value becomes M. A frequency division value of (MN+A+Bx) including the pseudo random value Bx is obtained in the comparison frequency divider 4. A fractional frequency division operation can be realized through ΣΔ modulation by using the pseudo random numbers including negative values, as they are.
摘要翻译： 在下面的B周期中，第二分频信号fA保持在低电平，而第三分频信号fB保持在高电平。 如果伪随机值是负值，则三模预分频器13具有分频值（M-1），如果伪随机值是正值，则分频值（M + 1）根据 从＆Sgr＆amp; Dgr输出的伪随机值; 调制器8.之后，分频值变为M.在比较分频器4中获得包括伪随机值Bx的（MN + A + Bx）的分频值。通过＆Sgr可以实现分数分频运算 ;＆Dgr 通过使用包括负值的伪随机数进行调制。
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公开(公告)号：US07714557B2
公开(公告)日：2010-05-11
申请号：US12057001
申请日：2008-03-27
申请人： Morihito Hasegawa
发明人： Morihito Hasegawa
CPC分类号： H02M1/36 , H02M3/156 , Y10S323/901
摘要： According to an embodiment, a DC-DC converter comprises: an error amplifier that receives a soft start signal and amplifies a difference between an output voltage signal and a reference voltage signal; a PWM control circuit that controls ON and OFF states of a first switching transistor and a second switching transistor based on the output of the error amplifier; a frequency divider that divides a frequency signal and outputting a divided frequency signal; an accumulator that performs an adding operation based on the divided frequency signal and a control signal; and a DA converter that generates the soft start signal based on an output of the accumulator.
摘要翻译： 根据实施例，DC-DC转换器包括：误差放大器，其接收软启动信号并放大输出电压信号和参考电压信号之间的差; PWM控制电路，其基于误差放大器的输出来控制第一开关晶体管和第二开关晶体管的导通和截止状态; 分频器，分频频率信号并输出分频信号; 累加器，其基于所述分频信号和控制信号执行相加操作; 以及基于累加器的输出生成软启动信号的DA转换器。
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公开(公告)号：US08760133B2
公开(公告)日：2014-06-24
申请号：US12255356
申请日：2008-10-21
申请人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Yat Fong Yung
发明人： Morihito Hasegawa , Hidenobu Ito , Kwok Fai Hui , Yat Fong Yung
IPC分类号： G05F1/40
CPC分类号： G05F1/575
摘要： According to one aspect of the embodiment, a linear regulator circuit includes an output transistor outputting an output current based on a input voltage, an error amplifier outputting a control signal based on an electric potential difference between an output voltage based on the output current and a reference voltage, a buffer circuit coupled between the error amplifier and the output transistor, and a drive capability adjustment circuit adjusting a load drive capability of the buffer circuit in synchronization with the output current.
摘要翻译： 根据本实施例的一个方面，线性调节器电路包括输出晶体管，其基于输入电压输出输出电流;误差放大器，基于输出电流的输出电压和基于输出电流的电位差输出控制信号; 参考电压，耦合在误差放大器和输出晶体管之间的缓冲电路，以及与输出电流同步地调节缓冲电路的负载驱动能力的驱动能力调整电路。
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公开(公告)号：US07777473B2
公开(公告)日：2010-08-17
申请号：US12257222
申请日：2008-10-23
CPC分类号： H02M1/38 , H03K2017/307
摘要： A DC-DC converter prevents through current from flowing in an output transistor. A first transistor receives an input voltage. A second transistor is connected to the first transistor. A comparator is connected to the second transistor. The comparator detects current flowing through a choke coil based on the potential difference between two terminals of the second transistor to generate a switching control signal for turning the second transistor on and off. The second transistor and the comparator form an ideal diode. A control circuit of the DC-DC converter generates an activation signal for turning the first transistor on and off based on a pulse signal to keep an output voltage constant. A through current prevention pulse generation circuit generates a pulse signal for turning off the second transistor from before the first transistor is turned on to after the first transistor is turned on.
摘要翻译： DC-DC转换器防止直流电流流入输出晶体管。 第一晶体管接收输入电压。 第二晶体管连接到第一晶体管。 比较器连接到第二晶体管。 比较器基于第二晶体管的两个端子之间的电位差来检测流过扼流线圈的电流，以产生用于使第二晶体管接通和关断的开关控制信号。 第二个晶体管和比较器构成一个理想的二极管。 DC-DC转换器的控制电路基于脉冲信号产生用于使第一晶体管导通和截止的激活信号，以保持输出电压恒定。 通过电流防止脉冲产生电路在第一晶体管导通之后到第一晶体管导通之后产生用于使第二晶体管截止的脉冲信号。
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30.发明申请CONTROL CIRCUIT OF CURRENT MODE DC-DC CONVERTER AND CONTROL METHOD OF CURRENT MODE DC-DC CONVERTER 有权电流模式DC-DC转换器的控制电路和电流模式DC-DC转换器的控制方法公开(公告)号：US20080111530A1
公开(公告)日：2008-05-15
申请号：US11936933
申请日：2007-11-08
IPC分类号： G05F1/10
CPC分类号： H02M3/156 , H02M2001/0009
摘要： To provide a control circuit of a current mode DC-DC converter, a current mode DC-DC converter and a control method thereof having excellent high-speed responsiveness with respect to fluctuations in output voltage. The control circuit of the current mode DC-DC converter serves as a DC-DC converter 1 that controls a peak value of a coil current and comprises a window comparator that detects whether an output voltage VOUT is within a predetermined voltage range including a target voltage, and a peak current setting unit that sets a peak current setting value of a coil current to a lower limit value or an upper limit value in response to a high or low voltage level of the output voltage VOUT, in the case that the output voltage VOUT is not within the predetermined voltage range including the target voltage.
摘要翻译： 提供电流模式DC-DC转换器的控制电路，电流模式DC-DC转换器及其控制方法，其具有相对于输出电压波动的优异的高速响应性。 电流模式DC-DC转换器的控制电路充当DC-DC转换器1，其控制线圈电流的峰值，并且包括窗口比较器，其检测输出电压VOUT是否在包括目标电压的预定电压范围内 以及峰值电流设定单元，其在输出电压的情况下，将线圈电流的峰值电流设定值设定为响应于输出电压VOUT的高或低电压电平的下限值或上限值 VOUT不在包括目标电压的预定电压范围内。
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