3D active depth sensing with laser pulse train bursts and a gated sensor

    公开(公告)号:US11438486B2

    公开(公告)日:2022-09-06

    申请号:US16550938

    申请日:2019-08-26

    Abstract: This disclosure provides systems, methods, and apparatuses for sensing a scene. In one aspect, a device may illuminate the scene using a sequence of two or more periods. Each period may include a transmission portion during which a plurality of light pulses are emitted onto the scene. Each period may include a non-transmission portion corresponding to an absence of emitted light. The device may receive, during each transmission portion, a plurality of light pulses reflected from the scene. The device may continuously accumulate photoelectric charge indicative of the received light pulses during an entirety of the sequence. The device may transfer the accumulated photoelectric charge to a readout circuit after an end of the sequence.

    High dynamic range solid state image sensor and camera system

    公开(公告)号:US11297258B2

    公开(公告)日:2022-04-05

    申请号:US15141388

    申请日:2016-04-28

    Abstract: A high dynamic range solid state image sensor and camera system are disclosed. In one aspect, the solid state image sensor includes a first wafer including an array of pixels, each of the pixels comprising a photosensor, and a second wafer including an array of readout circuits. Each of the readout circuits is configured to output a readout signal indicative of an amount of light received by a corresponding one of the pixels and each of the readout circuits includes a counter. Each of the counters is configured to increment in response to the corresponding photosensor receiving an amount of light that is greater than a photosensor threshold. Each of the readout circuits is configured to generate the readout signal based on a value stored in the corresponding counter and a remainder stored in the corresponding pixel.

    WIDE-ANGLE 3D SENSING
    23.
    发明申请

    公开(公告)号:US20210321021A1

    公开(公告)日:2021-10-14

    申请号:US16848487

    申请日:2020-04-14

    Abstract: Aspects of the present disclosure relate to depth sensing using a device. An example device includes a first light projector configured to project light towards a second light projector configured to project light towards the first light projector. The example device includes a reflective component positioned between the first and second light projectors, the reflective component configured to redirect the light projected by the first light projector onto a first portion of a scene and to redirect the light projected by the second light projector onto a second portion of the scene, and the first and second portions of the scene being adjacent to one another and non-overlapping relative to one another. The example device includes a receiver configured to detect reflections of redirected light projected by the first and second light projectors.

    3D ACTIVE DEPTH SENSING WITH LASER PULSE TRAIN BURSTS AND A GATED SENSOR

    公开(公告)号:US20210067662A1

    公开(公告)日:2021-03-04

    申请号:US16550938

    申请日:2019-08-26

    Abstract: This disclosure provides systems, methods, and apparatuses for sensing a scene. In one aspect, a device may illuminate the scene using a sequence of two or more periods. Each period may include a transmission portion during which a plurality of light pulses are emitted onto the scene. Each period may include a non-transmission portion corresponding to an absence of emitted light. The device may receive, during each transmission portion, a plurality of light pulses reflected from the scene. The device may continuously accumulate photoelectric charge indicative of the received light pulses during an entirety of the sequence. The device may transfer the accumulated photoelectric charge to a readout circuit after an end of the sequence.

    Pixel readout architecture for full well capacity extension
    26.
    发明授权
    Pixel readout architecture for full well capacity extension 有权
    像素读出架构,用于完整的容量扩展

    公开(公告)号:US09332200B1

    公开(公告)日:2016-05-03

    申请号:US14562444

    申请日:2014-12-05

    Abstract: Certain aspects relate to systems and techniques for full well capacity extension. For example, a storage capacitor included in the pixel readout architecture can enable multiple charge dumps from a pixel in the analog domain, extending the full well capacity of the pixel. Further, multiple reads can be integrated in the digital domain using a memory, for example DRAM, in communication with the pixel readout architecture. This also can effectively multiply a small pixel's full well capacity. In some examples, multiple reads in the digital domain can be used to reduce, eliminate, or compensate for kTC noise in the pixel readout architecture.

    Abstract translation: 某些方面涉及全井容量扩展的系统和技术。 例如,包括在像素读出结构中的存储电容器可以实现来自模拟域中的像素的多次电荷转储,从而延长像素的全部阱容量。 此外,可以使用与像素读出架构通信的存储器(例如DRAM)在数字域中集成多个读取。 这也可以有效地增加小像素的满井容量。 在一些示例中,可以使用数字域中的多次读取来减少,消除或补偿像素读出架构中的kTC噪声。

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