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公开(公告)号:US20230164463A1
公开(公告)日:2023-05-25
申请号:US17697898
申请日:2022-03-17
发明人: Jung-Yu Tsai , Chen-Tsung Wu , Kuan-Lin Wu , Hung-Yu Yang
IPC分类号: H04N5/3745 , H04N5/376 , H03M1/18
CPC分类号: H04N5/37455 , H04N5/3765 , H03M1/18
摘要: An image compensation circuit for an image sensor includes a gain amplifier, a compensation control circuit, a memory and a digital-to-analog converter (DAC). The gain amplifier is used for receiving a plurality of image signals from the image sensor and amplifying the plurality of image signals. The compensation control circuit is used for generating a plurality of compensation values for the plurality of image signals. The memory, coupled to the compensation control circuit, is used for storing the plurality of compensation values. The DAC, coupled to the memory and the gain amplifier, is used for converting the plurality of compensation values into a plurality of compensation voltages, respectively, to compensate the plurality of image signals with the plurality of compensation voltages.
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公开(公告)号:US20190253653A1
公开(公告)日:2019-08-15
申请号:US16268269
申请日:2019-02-05
CPC分类号: H04N5/379 , H04N5/3765
摘要: Provided is an imaging device including: a photoelectric converter; an AD converter unit including a differential stage; and a ramp signal generator. The photoelectric converter and a first part of the differential stage are arranged in a first chip, a second part of the differential stage is arranged in a second chip that is a different chip from the first chip and stacked on the first chip, and the ramp signal generator is arranged in a different chip from the first chip.
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公开(公告)号:US20190253067A1
公开(公告)日:2019-08-15
申请号:US16272102
申请日:2019-02-11
发明人: Seiichirou Sakai
IPC分类号: H03M1/56 , H04N5/378 , H04N5/3745 , H04N5/376 , H01L27/146
CPC分类号: H03M1/56 , H01L27/14612 , H01L27/14643 , H04N5/37455 , H04N5/37457 , H04N5/3765 , H04N5/378
摘要: An image pickup device, comprises: a pixel configured to output a signal based on a light reception amount; and an AD conversion unit. The AD conversion unit includes: an amplifier circuit configured to amplify a signal that is output from the pixel; a comparator circuit including an output node for outputting a comparison result signal generated by using an output signal from the amplifier circuit and a ramp signal; a memory configured to hold a digital value corresponding to the output signal, based on a result of the comparator circuit; a gain switching circuit configured to switch a gain of the amplifier circuit; and a ramp signal switching circuit configured to switch a slope of the ramp signal. The gain switching circuit and the ramp signal switching circuit are electrically connected to the output node.
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公开(公告)号:US20190222796A1
公开(公告)日:2019-07-18
申请号:US16245528
申请日:2019-01-11
发明人: Rei FUJIKI , Daisuke Iwama
CPC分类号: H04N5/77 , H04N5/3765 , H04N5/38 , H04N5/44 , H04N7/181
摘要: A video signal transmission and reception system includes a first video signal receiver and a second video signal receiver in a video signal reception module and a video signal transmitter in a camera module. The video signal reception module includes the first video signal receiver, the second video signal receiver, and a central operation processor. A frame signal generated in the first video signal receiver is sent to a video signal transmitter of a first group and is output to the second video signal receiver. In addition, the frame signal generated in the first video signal receiver is input into the second video signal receiver and is sent to a video signal transmitter of a second group from the second video signal receiver.
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公开(公告)号:US20190222790A1
公开(公告)日:2019-07-18
申请号:US16245493
申请日:2019-01-11
发明人: Rei FUJIKI , Daisuke Iwama
CPC分类号: H04N5/3765 , H04N5/38 , H04N5/44 , H04N5/77 , H04N7/181
摘要: A video signal receiver includes a clock signal receiver, a frame signal generator, and a frame signal transmitter. The clock signal receiver receives a camera video signal clock sent from a video signal transmitter in a camera module and outputs the clock to the frame signal generator. The frame signal generator generates a frame signal based on the clock received by the clock signal receiver and outputs the frame signal to the frame signal transmitter. The frame signal transmitter receives input of the frame signal output from the frame signal generator and sends the frame signal to the video signal transmitter of each camera module.
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公开(公告)号:US20190208151A1
公开(公告)日:2019-07-04
申请号:US16325277
申请日:2017-08-08
发明人: Tadayuki TAURA
CPC分类号: H04N5/378 , G11C19/28 , H03M1/34 , H04N5/3745 , H04N5/37455 , H04N5/3765 , H04N5/379
摘要: The present disclosure relates to a solid-state imaging apparatus, a method for driving the solid-state imaging apparatus, and electronic equipment for improving the determination speed of comparators and allowing the comparators to operate faster. A differential input circuit operates on a first power supply voltage and outputs a signal when a voltage of a pixel signal is higher than a voltage of a reference signal. A voltage conversion circuit converts the output signal from the differential input circuit into a signal corresponding to a second power supply voltage. A positive feedback circuit accelerates a transition rate at which a comparison result signal of a comparison in voltage between the pixel signal and the reference signal is inverted. Multiple time code transfer sections each include a shift register that transfer a time code. The present disclosure can be applied, for example, to an imaging apparatus including A/D converters disposed in pixels.
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公开(公告)号:US20190206923A1
公开(公告)日:2019-07-04
申请号:US16290756
申请日:2019-03-01
申请人: SiOnyx, LLC
发明人: Jutao Jiang , Jeffrey McKee , Martin U. Pralle
IPC分类号: H01L27/146 , H04N5/376 , H01L25/16 , H04N9/04 , H04N5/3745 , H04N5/225
CPC分类号: H01L27/14649 , H01L25/167 , H01L27/1461 , H01L27/14612 , H01L27/14625 , H01L27/1464 , H01L27/14645 , H01L27/14647 , H01L2924/0002 , H04N5/2256 , H04N5/37452 , H04N5/3765 , H04N9/045 , H01L2924/00
摘要: A monolithic sensor for detecting infrared and visible light according to an example includes a semiconductor substrate and a semiconductor layer coupled to the semiconductor substrate. The semiconductor layer includes a device surface opposite the semiconductor substrate. A visible light photodiode is formed at the device surface. An infrared photodiode is also formed at the device surface and in proximity to the visible light photodiode. A textured region is coupled to the infrared photodiode and positioned to interact with electromagnetic radiation.
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公开(公告)号:US20190191112A1
公开(公告)日:2019-06-20
申请号:US16213277
申请日:2018-12-07
发明人: Yoshiko Shigiya , Shintaro Takenaka
CPC分类号: H04N5/357 , H04N5/3454 , H04N5/3532 , H04N5/3535 , H04N5/35554 , H04N5/36963 , H04N5/37452 , H04N5/3765 , H04N5/378
摘要: An embodiment includes: a pixel unit including first and second imaging regions arranged with effective pixels and first and second reference regions arranged with optical black pixels; and a scanning unit that performs, on a row-by-row basis, reset operations of photoelectric converters and readout operations of pixel signals based on charges generated in the photoelectric converters which includes charge transfer to transfer charges generated in the photoelectric converters to holding portions. The scanning unit drives the pixels in the first imaging region and the first reference region in a first condition where a period from the end of reset operation to the end of charge transfer is a first length and drives the pixels in the second imaging region and the second reference region in a second condition where a period from the end of reset operation to the end of charge transfer is a second length.
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公开(公告)号:US20190174091A1
公开(公告)日:2019-06-06
申请号:US16266154
申请日:2019-02-04
申请人: Sony Corporation
发明人: Kazuo Endo
IPC分类号: H04N7/01 , H04N13/139 , H04N5/232 , H04N9/79 , H04N7/22 , H04N7/18 , H04N5/77 , H04N5/04 , H04N5/217 , H04N5/91 , H04N13/189 , H04N13/30 , H04N13/239 , H04N5/38 , H04N9/04 , H04N5/376 , H04N5/225 , H04N13/296
CPC分类号: H04N7/0117 , H04N5/04 , H04N5/217 , H04N5/225 , H04N5/23203 , H04N5/23232 , H04N5/23293 , H04N5/3765 , H04N5/38 , H04N5/77 , H04N5/91 , H04N7/0135 , H04N7/183 , H04N7/22 , H04N9/045 , H04N9/45 , H04N9/79 , H04N13/139 , H04N13/189 , H04N13/239 , H04N13/296 , H04N13/30 , H04N2209/045
摘要: Disclosed herein is a camera system including, a camera apparatus having, an image sensor, a correction section, a first transmission processing section, and a synchronization processing section, and a video processing apparatus having a second transmission processing section and a conversion section, wherein the video processing apparatus outputs the video data obtained by the conversion by the conversion section.
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公开(公告)号:US20190104263A1
公开(公告)日:2019-04-04
申请号:US16141748
申请日:2018-09-25
IPC分类号: H04N5/341 , H04N5/378 , H04N5/3745 , H04N5/376
CPC分类号: H04N5/341 , H04N5/347 , H04N5/37455 , H04N5/37457 , H04N5/3765 , H04N5/378 , H04N5/379
摘要: Provided is an imaging device configured to sequentially perform AD conversion for A signals of pixels of the first row, A signals of pixels of the second row, A+B signals of the pixels of the first row, and A+B signals of the pixels of the second row.
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