-
公开(公告)号：US10972077B2
公开(公告)日：2021-04-06
申请号：US16912652
申请日：2020-06-25
Applicant: Silicon Laboratories Inc.
Inventor： Steffen Skaug , Vitor Pereira , Arup Mukherji
Abstract: An integrated circuit including a functional circuit including at least one swapping circuit node, multiple duplicate electronic circuits, and a switch circuit. The duplicate electronic circuits are integrated in close proximity with each other each including at least one electronic device that is susceptible to RTN. The switch circuit electrically couples a different selected subset of at least one of the duplicate electronic circuits to the at least one swapping circuit node for each of successive switching states during operation of the functional circuit. A method of reducing noise including selecting a subset of the duplicate electronic circuits, electrically coupling the selected duplicate electronic devices to at least one swapping circuit node of a functional circuit, and repeating the selecting and electrically coupling in successive switching states during operation of the functional circuit for different subsets of the duplicate electronic circuits.
-
公开(公告)号：US10033421B2
公开(公告)日：2018-07-24
申请号：US15168318
申请日：2016-05-31
Applicant: Silicon Laboratories Inc.
Inventor： Vitor Pereira , Mustafa Koroglu , Ruifeng Sun , Ramin Khoini-Poorfard , Abdulkerim Coban , Yu Su , Krishna Pentakota
Abstract: In one example, a semiconductor die includes multi-standard, multi-channel expandable television/satellite receiver that can be flexibly implemented in a number of different configurations to enable incorporation into a plurality of different systems. The semiconductor die may include multiple tuners to receive and tune a terrestrial radio frequency (RF) signal and a satellite RF signal. These tuners may include different frequency synthesizers including voltage controlled oscillators (VCOs) to generate VCO signals at different frequencies, mixers to downconvert the RF signals to baseband signals using the VCO signals. In an implementation, the semiconductor die may further include shared circuitry coupled to the tuners to digitize, process and demodulate the baseband signals.
-
公开(公告)号：US09491393B2
公开(公告)日：2016-11-08
申请号：US14972958
申请日：2015-12-17
Applicant: SILICON LABORATORIES INC.
Inventor： Vitor Pereira , Pascal Blouin , David LeGoff , Frederic Nicolas
IPC: H04N5/46 , H04N21/426 , H04N21/438 , H04N21/462 , H04N21/61 , H04N5/455 , H04N5/268
CPC classification number: H04N5/46 , H01L2224/05554 , H01L2224/48091 , H01L2224/49113 , H01L2225/06562 , H04N5/268 , H04N5/455 , H04N21/42615 , H04N21/4263 , H04N21/42676 , H04N21/4382 , H04N21/4383 , H04N21/4622 , H04N21/6112 , H04N21/6118 , H04N21/6143 , H01L2924/00014
Abstract: In one form, a multi-chip module for a multi-mode receiver includes an MCM substrate and first and second demodulator die. The MCM substrate has first and second satellite input ports, first and second terrestrial/cable input ports, and first and second transport stream ports. The first demodulator die has a satellite port coupled to the first satellite input port of the MCM substrate, a terrestrial/cable port coupled to the first terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate. The second demodulator die has a satellite port coupled to the second satellite input port of the MCM substrate, a terrestrial/cable port coupled to the second terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate.
Abstract translation: 在一种形式中，用于多模式接收器的多芯片模块包括MCM衬底和第一和第二解调器管芯。 MCM衬底具有第一和第二卫星输入端口，第一和第二地面/电缆输入端口以及第一和第二传输流端口。 第一解调器管芯具有耦合到MCM衬底的第一卫星输入端口的卫星端口，耦合到MCM衬底的第一地面/电缆输入端口的地面/电缆端口，以及耦合到第一和第二传输流端口的第一和第二传输流端口 和MCM基板的第二传输流端口。 第二解调器管芯具有耦合到MCM衬底的第二卫星输入端口的卫星端口，耦合到MCM衬底的第二地面/电缆输入端口的地面/电缆端口，以及耦合到第一和第二传输流端口的第一和第二传输流端口 和MCM基板的第二传输流端口。
-
公开(公告)号：US20160105629A1
公开(公告)日：2016-04-14
申请号：US14972958
申请日：2015-12-17
Applicant: SILICON LABORATORIES INC.
Inventor： Vitor Pereira , Pascal Blouin , David LeGoff , Frederic Nicolas
IPC: H04N5/46 , H04N5/268 , H04N21/61 , H04N21/438 , H04N21/462 , H04N5/455 , H04N21/426
CPC classification number: H04N5/46 , H01L2224/05554 , H01L2224/48091 , H01L2224/49113 , H01L2225/06562 , H04N5/268 , H04N5/455 , H04N21/42615 , H04N21/4263 , H04N21/42676 , H04N21/4382 , H04N21/4383 , H04N21/4622 , H04N21/6112 , H04N21/6118 , H04N21/6143 , H01L2924/00014
Abstract: In one form, a multi-chip module for a multi-mode receiver includes an MCM substrate and first and second demodulator die. The MCM substrate has first and second satellite input ports, first and second terrestrial/cable input ports, and first and second transport stream ports. The first demodulator die has a satellite port coupled to the first satellite input port of the MCM substrate, a terrestrial/cable port coupled to the first terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate. The second demodulator die has a satellite port coupled to the second satellite input port of the MCM substrate, a terrestrial/cable port coupled to the second terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate.
Abstract translation: 在一种形式中，用于多模式接收器的多芯片模块包括MCM衬底和第一和第二解调器管芯。 MCM衬底具有第一和第二卫星输入端口，第一和第二地面/电缆输入端口以及第一和第二传输流端口。 第一解调器管芯具有耦合到MCM衬底的第一卫星输入端口的卫星端口，耦合到MCM衬底的第一地面/电缆输入端口的地面/电缆端口，以及耦合到第一和第二传输流端口的第一和第二传输流端口 和MCM基板的第二传输流端口。 第二解调器管芯具有耦合到MCM衬底的第二卫星输入端口的卫星端口，耦合到MCM衬底的第二地面/电缆输入端口的地面/电缆端口，以及耦合到第一和第二传输流端口的第一和第二传输流端口 和MCM基板的第二传输流端口。
-
公开(公告)号：US12212349B2
公开(公告)日：2025-01-28
申请号：US18474395
申请日：2023-09-26
Applicant: Silicon Laboratories Inc.
Inventor： Euisoo Yoo , Arup Mukherji , Rangakrishnan Srinivasan , Vitor Pereira , Zhongda Wang , Sriharsha Vasadi
Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
-
Patent Agency Ranking
公开(公告)号：US12009793B2
公开(公告)日：2024-06-11
申请号：US18175593
申请日：2023-02-28
Applicant: Silicon Laboratories Inc.
Inventor： Ruifeng Sun , Sherry Wu , Michael S. Johnson , Vitor Pereira
CPC classification number: H03F3/245 , H03F1/0233 , H04B1/04 , H04L27/12 , H03F2200/105 , H03F2200/451 , H04B2001/0408
Abstract: In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.
-
公开(公告)号：US11984866B2
公开(公告)日：2024-05-14
申请号：US17892492
申请日：2022-08-22
Applicant: Silicon Laboratories Inc.
Inventor： Vitor Pereira , Jeffrey A. Tindle , Mustafa H. Koroglu , Terry Lee Dickey
CPC classification number: H03H7/0115 , H03H7/0153 , H04B1/0458 , H04B1/18 , H04B1/40 , H03H2007/013
Abstract: A wireless transceiver including a receiver circuit coupled to an RF transceiver node, a tunable notch filter coupled between the RF transceiver node and a reference node, and a controller that programs the tunable notch filter with a selected blocker frequency and that selectively enables the tunable notch filter to attenuate at least one blocker signal. The tunable notch filter may include a variable capacitor and an inductor coupled in series between the RF transceiver node and ground. The inductor of the tunable notch filter may include a bondwire coupled between a semiconductor die and a semiconductor package. The inductance may include a physical inductor mounted on the package or a printed circuit board. The tunable notch filter may be enabled by a switch selectively coupling the filter to either the RF transceiver node or ground. The variable capacitor may be digitally programmed with digital values stored in a memory.
-
公开(公告)号：US11804862B2
公开(公告)日：2023-10-31
申请号：US17490255
申请日：2021-09-30
Applicant: Silicon Laboratories Inc.
Inventor： Euisoo Yoo , Arup Mukherji , Rangakrishnan Srinivasan , Vitor Pereira , Zhongda Wang , Sriharsha Vasadi
CPC classification number: H04B1/0064 , H03F3/195 , H03H7/38 , H03F2200/294 , H03F2200/451
Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
-
公开(公告)号：US11463064B2
公开(公告)日：2022-10-04
申请号：US16706433
申请日：2019-12-06
Applicant: Silicon Laboratories Inc.
Inventor： Vitor Pereira , Jeffrey A. Tindle , Mustafa H. Koroglu , Terry Lee Dickey
Abstract: A wireless transceiver including a receiver circuit coupled to an RF transceiver node, a tunable notch filter coupled between the RF transceiver node and a reference node, and a controller that programs the tunable notch filter with a selected blocker frequency and that selectively enables the tunable notch filter to attenuate at least one blocker signal. The tunable notch filter may include a variable capacitor and an inductor coupled in series between the RF transceiver node and ground. The inductor of the tunable notch filter may include a bondwire coupled between a semiconductor die and a semiconductor package. The inductance may include a physical inductor mounted on the package or a printed circuit board. The tunable notch filter may be enabled by a switch selectively coupling the filter to either the RF transceiver node or ground. The variable capacitor may be digitally programmed with digital values stored in a memory.
-
30.发明授权公开(公告)号：US11387857B2
公开(公告)日：2022-07-12
申请号：US16998740
申请日：2020-08-20
Applicant: Silicon Laboratories Inc.
Inventor： Arup Mukherji , Vitor Pereira , Jeffrey A. Tindle , Mustafa H. Koroglu , Terry Lee Dickey
Abstract: A wireless device including a receiver circuit coupled to a radio frequency receiver node, a frequency selective attenuator including an inductor and a first capacitor coupled in series to the radio frequency receiver node, and a second capacitor coupled in parallel with the first capacitor. The first capacitor has a first capacitance based on a blocker frequency and the second capacitor has a second capacitance that linearizes the frequency selective attenuator. A method of linearizing a frequency selective attenuator including detecting presence of a blocker signal, activating and programming a capacitor of the frequency selective attenuator to reduce a strength of the blocker signal, determining a frequency difference between the blocker signal and a receive frequency, and coupling a second capacitor to the frequency selective attenuator to linearize the frequency selective attenuator when the frequency difference is no more than an attenuation threshold.
-
-
-
-
-
-
-
-
-
Search Results
34
records
(took 0.022 seconds)
