Utilizing the LC oscillator of a frequency synthesizer as an injection source for crystal oscillator startup

    公开(公告)号:US11699974B1

    公开(公告)日:2023-07-11

    申请号:US17853064

    申请日:2022-06-29

    IPC分类号: H03B5/06 H03B5/36 H03L7/099

    CPC分类号: H03B5/06 H03B5/36 H03L7/099

    摘要: A frequency synthesizer on an integrated circuit provides a local oscillator (LO) signal for RF operations and also functions as an injection clock signal source during crystal oscillator startup. The integrated circuit goes into a sleep mode in which the crystal oscillator is off and responsive to a wakeup event the crystal oscillator starts up again using the injection clock signal sourced from the frequency synthesizer. Parameters that cause the injection clock signal to match the crystal oscillator frequency are stored. The frequency synthesizer includes a phase-locked loop having an LC oscillator. A digital to analog converter controls the LC oscillator during injection. During an initial power up of the integrated circuit, a PLL in the frequency synthesizer locks to the crystal oscillator frequency to determine the parameters to store for injection.

    Low power, efficient doherty power amplifier

    公开(公告)号:US11190147B1

    公开(公告)日:2021-11-30

    申请号:US16904821

    申请日:2020-06-18

    摘要: In one embodiment, an apparatus includes: a digital baseband circuit to receive a digital baseband signal and output a first digital baseband signal and a second digital baseband signal, the second digital baseband signal comprising a scaled version of the first digital baseband signal; a first transmitter signal path coupled to the digital baseband circuit to process the first digital baseband signal and output a first radio frequency (RF) signal; a second transmitter signal path coupled to the digital baseband circuit to process the second digital baseband signal and output a second RF signal; a first power amplifier coupled to the first transmitter signal path to amplify the first RF signal and output an amplified first RF signal; and a second power amplifier coupled to the second transmitter signal path to amplify the second RF signal and output an amplified second RF signal.

    REDUCING OUTPUT HARMONICS AND GROUND BOUNCE IN A TRANSMITTER

    公开(公告)号:US20240106398A1

    公开(公告)日:2024-03-28

    申请号:US17955171

    申请日:2022-09-28

    IPC分类号: H03F3/24 H04B1/04

    摘要: In one aspect, an apparatus comprises: a driver circuit to receive first and second ramp signals and output first and second drive signals under control of a first bias signal and a second bias signal, the first bias signal having a first edge and a second edge, the second edge having a different edge rate than the first edge, the second bias signal having a third edge and a fourth edge, the third edge having a different edge rate than the fourth edge; and an output circuit coupled to the driver circuit, the output circuit comprising at least one first active device to be driven by the first drive signal and at least one second active device to be driven by the second drive signal, where the output circuit is to amplify and output a radio frequency (RF) signal.

    Radio frequency power amplifier adaptive digital pre-distortion

    公开(公告)号:US11316482B2

    公开(公告)日:2022-04-26

    申请号:US16904811

    申请日:2020-06-18

    IPC分类号: H03F1/32 H03F3/24 H04B1/04

    摘要: In an embodiment, an apparatus includes: a modulator to modulate a first signal; a distortion circuit coupled to the modulator to digitally pre-distort the first signal to compensate for a distortion of an amplifier; a distortion characterization circuit coupled to the distortion circuit to determine the distortion of the amplifier and configure the distortion circuit based on the determined distortion; a mixer coupled to the distortion circuit to upconvert the pre-distorted first signal to a pre-distorted radio frequency (RF) signal; and the amplifier coupled to the mixer to amplify the pre-distorted RF signal and output an amplified RF signal.

    Multi-standard, multi-channel expandable TV/satellite receiver

    公开(公告)号:US10033421B2

    公开(公告)日:2018-07-24

    申请号:US15168318

    申请日:2016-05-31

    IPC分类号: H04B1/30 H04B1/00 H04B1/10

    摘要: In one example, a semiconductor die includes multi-standard, multi-channel expandable television/satellite receiver that can be flexibly implemented in a number of different configurations to enable incorporation into a plurality of different systems. The semiconductor die may include multiple tuners to receive and tune a terrestrial radio frequency (RF) signal and a satellite RF signal. These tuners may include different frequency synthesizers including voltage controlled oscillators (VCOs) to generate VCO signals at different frequencies, mixers to downconvert the RF signals to baseband signals using the VCO signals. In an implementation, the semiconductor die may further include shared circuitry coupled to the tuners to digitize, process and demodulate the baseband signals.