DISPLAY DEVICE
    21.
    发明申请

    公开(公告)号:US20210166616A1

    公开(公告)日:2021-06-03

    申请号:US16898439

    申请日:2020-06-11

    Abstract: The current disclosure relates to a display device including a display panel including a plurality of pixels, and a plurality of gate lines and a plurality of data lines connected to the plurality of pixels, a gate driver applying a gate signal to the plurality of gate lines, a data driver applying a data signal to the plurality of data lines, and a voltage provider configured to generate a gate-on voltage that is gradually changed in one frame and a kickback voltage that is gradually changed in one frame to transmit the gate-on voltage and the kickback voltage to the gate driver.

    DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20210143235A1

    公开(公告)日:2021-05-13

    申请号:US17073874

    申请日:2020-10-19

    Abstract: A display device includes a base substrate, a pixel defining layer disposed on the base substrate and including a first opening, a light emitting structure disposed in the first opening of the pixel defining layer, a thin film encapsulation layer disposed on the light emitting structure, a touch electrode disposed on the thin film encapsulation layer, an insulating pattern disposed on the touch electrode and including a second opening which overlaps the first opening, and a high refractive layer disposed on the insulating pattern, the high refractive layer including a plurality of grid patterns disposed on a top surface of the high refractive layer, and a refractive index higher than a refractive index of the insulating pattern.

    DISPLAY DEVICE AND DRIVING METHOD THEREOF

    公开(公告)号:US20210074194A1

    公开(公告)日:2021-03-11

    申请号:US16861926

    申请日:2020-04-29

    Abstract: A display device includes a display panel, a power supply, a signal controller configured to generate first and second clock signals having a period, a clock signal generator configured to generate a gate clock signal that is raised to a high level voltage in synchronization with the first clock signal, and that falls to a low level voltage in synchronization with the second clock signal, generate a panel separation signal by comparing a voltage of the gate clock signal with a first reference voltage during a falling period during which the gate clock signal falls, and transfer the panel separation signal to the power supply or the signal controller, and a gate driver configured to sequentially apply a gate signal by using the gate clock signal, wherein the power supply or the signal controller is configured to stop outputting depending on the panel separation signal.

    DISPLAY DEVICE
    24.
    发明申请

    公开(公告)号:US20250014513A1

    公开(公告)日:2025-01-09

    申请号:US18895394

    申请日:2024-09-25

    Abstract: The current disclosure relates to a display device including a display panel including a plurality of pixels, and a plurality of gate lines and a plurality of data lines connected to the plurality of pixels, a gate driver applying a gate signal to the plurality of gate lines, a data driver applying a data signal to the plurality of data lines, and a voltage provider configured to generate a gate-on voltage that is gradually changed in one frame and a kickback voltage that is gradually changed in one frame to transmit the gate-on voltage and the kickback voltage to the gate driver.

    CLOCK GENERATOR AND DISPLAY DEVICE INCLUDING THE SAME

    公开(公告)号:US20230162688A1

    公开(公告)日:2023-05-25

    申请号:US18158349

    申请日:2023-01-23

    CPC classification number: G09G3/3266 G09G3/3275 G09G3/3233

    Abstract: A display device includes a display unit including gate lines and pixels electrically coupled to the gate lines; a timing controller configured to generate an on-clock signal, an off-clock signal, an enable signal, and a common signal; a clock generator configured to generate a plurality of clock signals having different phases based on the on-clock signal and the off-clock signal, when the enable signal has a first voltage level, wherein the clock generator is to insert a common pulse into each of the plurality of clock signals based on the common signal, when the enable signal has a second voltage level different from the first voltage level; and a gate driver configured to generate gate signals based on the plurality of clock signals, and to sequentially provide the gate signals to the gate lines.

    POWER MANAGEMENT DRIVER AND DISPLAY DEVICE HAVING THE SAME

    公开(公告)号:US20220293058A1

    公开(公告)日:2022-09-15

    申请号:US17832179

    申请日:2022-06-03

    Abstract: A power management driver and a display device having the power management driver are provided, including a first power supply configured to supply a first voltage to a first driving power terminal of a pixel through a power line during a sensing period, and supply a second voltage to the first driving power terminal of the pixel through the power line during a display period; a controller configured to control timing at which the first voltage is output and timing at which the second voltage is output during a transition period between the display period and the sensing period in response to a sensing control signal; and a fault detector configured to detect a fault in the power line based on a current flowing through an output terminal during the sensing period.

    DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20220231090A1

    公开(公告)日:2022-07-21

    申请号:US17648061

    申请日:2022-01-14

    Abstract: A display device includes a display member and a touch member disposed on the display member. The touch member includes a first touch insulating disposed on the display member, a first touch conductive layer disposed on the first touch insulating layer and including a touch bridge electrode, a second touch insulating layer disposed on the first touch conductive layer, including an organic material, and including a first contact hole penetrating the second touch insulating layer in a thickness direction, a second touch conductive layer disposed on the second touch insulating layer and including a first lower sensing line overlapping the second touch bridge electrode, and a third touch conductive layer disposed on the second touch conductive layer and including a first upper sensing line overlapping the first lower sensing line. A width of the first upper sensing line is greater than a width of the first lower sensing line.

    DISPLAY DEVICE AND METHOD OF DRIVING THE SAME

    公开(公告)号:US20210209989A1

    公开(公告)日:2021-07-08

    申请号:US17081427

    申请日:2020-10-27

    Abstract: A display device includes a display panel including a plurality of pixels, a scan driver which supplies scan signals and sensing control signals to scan lines and sensing control lines, based on a clock signal, a power manager which applies initialization power to initialization lines, a sensor which senses threshold voltages of driving transistors, a detector which detects an error of the initialization lines and outputs line information indicating an initialization line having the error, a timing controller which changes a sensed threshold voltage using the initialization line having the error and generates image data with reference to a changed threshold voltage, and a data driver which supplies a data signal corresponding to the image data to data lines.

    DISPLAY DEVICE
    29.
    发明申请

    公开(公告)号:US20210142714A1

    公开(公告)日:2021-05-13

    申请号:US16917740

    申请日:2020-06-30

    Abstract: A display device may include a timing controller, a level shifter, a gate driver, and a display panel. The timing controller may generate a first on-clock signal, a first off-clock signal, and a first output control signal. The level shifter may generate a first-type gate clock signal. A rising edge of the first-type gate clock signal and a falling edge of the first-type gate clock signal may be respectively synchronized with a rising edge of the first on-clock signal and a falling edge of the first off-clock signal. The gate driver may output first-type gate signals based on the first-type gate clock signal. The display panel may include pixels. The pixels may emit lights in response to the first-type gate signals. The level shifter may partially block a pulse of the first-type gate clock signal based on the first output control signal to generate sub-pulses.

    POWER SUPPLY AND DRIVING METHOD OF THE SAME
    30.
    发明申请
    POWER SUPPLY AND DRIVING METHOD OF THE SAME 有权
    电源及其驱动方法

    公开(公告)号:US20170054370A1

    公开(公告)日:2017-02-23

    申请号:US15132485

    申请日:2016-04-19

    CPC classification number: H02M1/15 H02M3/156 H02M3/33507 H02M2001/0009

    Abstract: A power supply includes a direct current to direct current converter that includes at least one switching element and that converts an externally supplied input voltage to an output voltage and then supplies the output voltage to a load, a current sensor that detects a frequency of a load current by sensing the load current, and a switching controller that sets a switching frequency corresponding to the frequency of the load current and that controls an operation of the at least one switching element according to the set switching frequency.

    Abstract translation: 电源包括直流至直流电转换器,其包括至少一个开关元件,并将外部提供的输入电压转换为输出电压,然后将输出电压提供给负载,检测负载频率的电流传感器 检测负载电流的电流;以及开关控制器,其设定与负载电流的频率对应的开关频率,并且根据设定的开关频率来控制所述至少一个开关元件的动作。

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