Abstract:
A display device includes a base substrate, a pixel defining layer disposed on the base substrate and including a first opening, a light emitting structure disposed in the first opening of the pixel defining layer, a thin film encapsulation layer disposed on the light emitting structure, a touch electrode disposed on the thin film encapsulation layer, an insulating pattern disposed on the touch electrode and including a second opening which overlaps the first opening, and a high refractive layer disposed on the insulating pattern, the high refractive layer including a plurality of grid patterns disposed on a top surface of the high refractive layer, and a refractive index higher than a refractive index of the insulating pattern.
Abstract:
A method of manufacturing a touch screen panel, including forming first and second conductive layers and an organic insulating layer on a substrate; forming a first organic insulating pattern having a first thickness and a second organic insulating pattern having a second thickness, the second thickness being larger than the first thickness; forming first and second conductive patterns; exposing a part of the second conductive pattern to form a third organic insulating pattern having a thickness smaller than the second thickness; removing the exposed second conductive pattern; forming an organic insulating capping layer surrounding the first and second conductive patterns positioned under the third organic insulating pattern; and forming a third conductive layer on the first conductive pattern and the organic insulating capping layer, the first conductive pattern being exposed, and then forming a connection pattern electrically connected with the exposed first conductive pattern using a second mask.
Abstract:
The present disclosure provides a thin film transistor array. In an exemplary embodiment, the thin film transistor array includes: a substrate; a gate line including a gate pad and disposed on the substrate; a gate insulating layer disposed on the gate line and the gate pad; a data line including a data pad and disposed on the gate insulating layer; a first passivation layer disposed on the data line; a first electrode disposed on the first passivation layer; a second passivation layer disposed on the first electrode; and a second electrode disposed on the second passivation layer. The gate pad is exposed through a first contact hole, and the gate insulating layer, the first passivation layer, and the second passivation layer include at least a portion of the first contact hole.
Abstract:
A wall structure, method of manufacturing the same, and display panel including the wall structure are disclosed. In one aspect, the wall structure includes a plurality of first walls each extending in a first direction and a plurality of second walls each extending in a second direction crossing the first direction so as to form an intersection region between the first and second walls. The first and second walls are configured to define and surround a plurality of pixel regions of the display device. Each of the first and second walls has a width greater at the intersection region than the remaining non-intersection region.
Abstract:
A thin film transistor array panel includes a substrate, a gate line and a gate pad disposed on the substrate, a gate insulating layer disposed on the gate line and the gate pad, a data line and a data pad disposed on the gate insulating layer, an organic layer disposed on the data line and the data pad, and a connecting member disposed on one of the gate pad and the data pad, in which the organic layer includes a first portion overlapping the connecting member and a second portion not overlapping the connecting member, and a height of the first portion of the organic layer is greater than a height of the second portion of the organic layer.
Abstract:
A method of manufacturing a pattern includes forming a pattern material layer on a substrate, forming a protective layer on the pattern material layer, forming a resist layer on the protective layer, selectively exposing the resist layer to light, and developing the selectively exposed resist layer.
Abstract:
Instead of forming contact holes the same way in both the non-image forming peripheral area (PA) and the image forming display area of a thin film transistor array panel, contact holes in the DA are formed to be substantially smaller than those in the PA for thereby improving an aperture ratio of the corresponding display device. In an exemplary embodiment, an inorganic gate insulating layer is not etched in the DA and only an inorganic first passivation layer among inorganic insulating layers positioned in the DA is etched to allow communication between the drain electrode and the corresponding field generating electrode. On the other hand, in the peripheral area, plural inorganic insulating layers such as the gate insulating laver, the first passivation laver, and the second passivation layer positioned on the gate wire and the data wire are simultaneously etched to form second contact holes and third contact holes exposing respective gate pads and data pads.
Abstract:
A display panel includes: a substrate including red, green, blue and white sub-pixel areas; red, green and blue color filter layers respectively in the red, green and blue sub-pixel areas; and a dummy color filter layer in the white sub-pixel area. The dummy color filter layer is adjacent to at least one of the red color filter layer, the green color filter layer, and the blue color filter layer, and the dummy color filter layer forms a step with the adjacent color filter layer.
Abstract:
A display device includes a base substrate, a pixel defining layer disposed on the base substrate and including a first opening, a light emitting structure disposed in the first opening of the pixel defining layer, a thin film encapsulation layer disposed on the light emitting structure, a touch electrode disposed on the thin film encapsulation layer, an insulating pattern disposed on the touch electrode and including a second opening which overlaps the first opening, and a high refractive layer disposed on the insulating pattern, the high refractive layer including a plurality of grid patterns disposed on a top surface of the high refractive layer, and a refractive index higher than a refractive index of the insulating pattern.
Abstract:
A photoresist composition, a method of forming a pattern, and a method of manufacturing a thin film transistor substrate, the composition including a solvent, a novolak resin, a diazide-based photo-sensitizer, an acryl compound represented by the following Chemical Formula 1: