公开(公告)号：US11594560B2

公开(公告)日：2023-02-28

申请号：US16940561

申请日：2020-07-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hyanga Park ,  Kibum Kim ,  Myeonghun Song ,  Jongchan Lee ,  Sanghee Jang ,  Woonghee Jeong

IPC: H01L27/12 ,  H01L27/32 ,  H01L51/50

Abstract: A display apparatus includes a substrate including a display area and a non-display area disposed around the display area, a driving circuit disposed in the non-display area, a first conductive line extending in a first direction and disposed in the non-display area, a second conductive line extending in the first direction and disposed on the first conductive line, and a third conductive line extending in the first direction and disposed on the second conductive line, wherein the second conductive line overlaps the first conductive line by a first width or is spaced apart from the first conductive line by a first distance in a plan view, and the third conductive line overlaps the first conductive line by a second width or is spaced apart from the first conductive line by a second distance in the plan view.

公开(公告)号：US20220028955A1

公开(公告)日：2022-01-27

申请号：US17298616

申请日：2019-05-08

Applicant: Samsung Display Co., Ltd.

Inventor： Juwon Yoon ,  Sanghee Jang ,  Kibum Kim ,  Taehoon Yang ,  Jeonghyun Lee ,  Jongchan Lee ,  Pilsuk Lee ,  Woonghee Jeong

IPC: H01L27/32 ,  H01L51/52

Abstract: An embodiment of the present disclosure comprises a display device including a substrate including a display area and a peripheral area around the display area, a thin-film transistor on the substrate in the display area and a display element electrically connected to the thin-film transistor, and a first voltage line and a second voltage line located on the substrate in the peripheral area and supplying power for driving the display element, wherein the first voltage line is a common voltage line and entirely surrounds the display area, the second voltage line is a driving voltage line and is arranged to correspond to one side of the display area, and the first voltage line and the second voltage line are on different layers.

公开(公告)号：US10854644B2

公开(公告)日：2020-12-01

申请号：US16106161

申请日：2018-08-21

Applicant: Samsung Display Co., Ltd.

Inventor： Jongchan Lee ,  Jaeseob Lee ,  Woonghee Jeong ,  Taehoon Yang ,  Yongsu Lee

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L21/266 ,  H01L27/32

Abstract: A display apparatus includes: at thin film transistor on a substrate; and a capacitor on the substrate, the capacitor including a first storage electrode and a second storage electrode. The thin film transistor includes: a semiconductor layer on the substrate, including: a channel region in which are disposed: bridged grain lines defined by portions of the semiconductor layer having an amount of a dopant, and semiconductor lines defined by portions of the semiconductor having a dopant amount less than that of the bridged grain lines and forming an interface with the bridged grain lines, and source and drain regions disposed at opposing sides of the channel region; and a gate electrode overlapping the semiconductor layer with a gate insulation film therebetween, the gate electrode including: first gate electrodes corresponding to the semiconductor lines, respectively, and a second gate electrode covering the gate electrodes.

公开(公告)号：US20190296095A1

公开(公告)日：2019-09-26

申请号：US16437857

申请日：2019-06-11

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jongchan Lee ,  Taehoon Yang ,  Woonghee Jeong ,  Kyoungwon Lee ,  Yongsu Lee

IPC: H01L27/32 ,  H01L27/12

Abstract: A display device includes at least one transistor. The transistor has an active pattern including a first active area and a second active area. The first active area includes a first channel area and an n-doped area contacting the first channel area. The second active area includes a second channel area and a p-doped area contacting the second channel area. A first insulation layer covers at least a portion of the active pattern. A first gate electrode is disposed on the first insulation layer and at least partially overlaps the first channel area. A second gate electrode is disposed on the first insulation layer and at least partially overlaps the second channel area. A taper angle of the second gate electrode is larger than a taper angle of the first gate electrode.

公开(公告)号：US10403649B2

公开(公告)日：2019-09-03

申请号：US15869748

申请日：2018-01-12

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Woonghee Jeong ,  Taehoon Yang ,  Kyoungwon Lee ,  Jongchan Lee ,  Yongsu Lee

IPC: H01L23/52 ,  H01L21/44 ,  H01L27/12 ,  H01L27/32

Abstract: A display device includes a common active pattern, a first gate electrode, and a second gate electrode. The common active pattern includes an NMOS area, a PMOS area, and a silicide area in a same layer as the NMOS area and the PMOS area. The silicide area electrically connects the NMOS area to the PMOS area. The NMOS area includes a first channel area and an n-doped area contacting the first channel area. The PMOS area includes a second channel area and a p-doped area contacting the second channel area. The first gate electrode overlaps the first channel area, and the second gate electrode overlaps the second channel area.

公开(公告)号：US20160148986A1

公开(公告)日：2016-05-26

申请号：US14919666

申请日：2015-10-21

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kyoungwon Lee ,  Yoonho Khang ,  Myounggeun Cha ,  Youngki Shin ,  Woonghee Jeong

IPC: H01L27/32 ,  G09G3/32 ,  H01L51/00 ,  H01L29/786 ,  H01L51/56 ,  H01L51/52

CPC classification number: H01L27/3262 ,  G09G3/3233 ,  G09G2300/0842 ,  H01L27/3265 ,  H01L29/6675 ,  H01L29/78645 ,  H01L29/78675 ,  H01L29/78696

Abstract: A transistor including a polysilicon layer on a base substrate and including a channel region, a first ion doping region, a second ion doping region, the channel region being between the first and second ion doping regions, an average size of the grains in the channel region being greater than that of the grains in the first and second ion doping regions, a first gate electrode insulated from and overlapping the channel region, a second gate electrode insulated from the first gate electrode and overlapping the channel region, an inter-insulating layer on the second gate electrode, a source electrode on the inter-insulating layer and connected to the first ion doping region, and a drain electrode on the inter-insulating layer and connected to the second ion doping region.

Abstract translation: 一种晶体管，包括在基底衬底上的多晶硅层，并且包括沟道区，第一离子掺杂区，第二离子掺杂区，沟道区在第一和第二离子掺杂区之间，沟道中的晶粒的平均尺寸 区域大于第一和第二离子掺杂区域中的晶粒的区域，与沟道区域绝缘并且与沟道区域重叠的第一栅极电极，与第一栅电极绝缘并与沟道区域重叠的第二栅极电极，绝缘层 在所述第二栅电极上，在所述绝缘层上并连接到所述第一离子掺杂区的源电极和所述绝缘层上的漏极连接到所述第二离子掺杂区。