Integrated three-phase power converter and method of operation thereof
    21.
    发明授权
    Integrated three-phase power converter and method of operation thereof 失效
    集成三相电源转换器及其工作方式

    公开(公告)号:US6026006A

    公开(公告)日:2000-02-15

    申请号:US157757

    申请日:1998-09-21

    摘要: An integrated three-phase power converter and method of operation thereof is provided. The integrated three-phase power converter includes: (1) first and second power switches coupled between corresponding rails of said power converter, (2) an input stage, including first, second and third L-C branches coupled between said first, second and third phase inputs and a node between said first and second power switches, adapted to receive phase voltages from a source of electrical power, and (3) an output stage, coupled to said first and second power switches, that provides a DC output voltage at said output, said first and second power switches cooperating to employ said input stage to reduce input current total harmonic distortion (THD) on all three of said phase inputs and said output stage to convert said phase voltages to said DC output voltage.

    摘要翻译: 提供一种集成的三相电力转换器及其操作方法。 集成的三相功率转换器包括:(1)耦合在所述功率转换器的相应导轨之间的第一和第二功率开关,(2)输入级,包括耦合在所述第一,第二和第三相之间的第一,第二和第三LC分支 输入和所述第一和第二功率开关之间的节点,适于从电源接收相电压;以及(3)耦合到所述第一和第二功率开关的输出级,其在所述输出端提供DC输出电压 所述第一和第二功率开关协同采用所述输入级以减少所有三相所述相位输入端和所述输出级上的输入电流总谐波失真(THD),以将所述相电压转换成所述直流输出电压。

    Dual mode split-boost converter and method of operation thereof
    22.
    发明授权
    Dual mode split-boost converter and method of operation thereof 失效
    双模分离升压转换器及其操作方法

    公开(公告)号:US6002241A

    公开(公告)日:1999-12-14

    申请号:US183076

    申请日:1998-10-30

    IPC分类号: H02M3/158 G05F1/613

    CPC分类号: H02M3/158 Y10T307/505

    摘要: A split-boost converter having a main inductor, first and second main switches and floating and fixed outputs and a method of operating the same. In one embodiment, the converter includes an auxiliary diode coupled between the main inductor and a first rail of the floating output, and an auxiliary switch coupled to a node between the main inductor and the auxiliary diode and a second rail of the floating output. The converter is operable in a first mode, when an input voltage of the converter at least equals an output voltage of the converter, in which the auxiliary switch remains open and the first and second main switches are modulated to operate the converter. The converter is further operable in a second mode, when an input voltage of the converter is less than an output voltage of the converter, in which the first and second main switches remain closed and the auxiliary switch is modulated to operate the converter.

    摘要翻译: 具有主电感器,第一和第二主开关以及浮动和固定输出的分压升压转换器及其操作方法。 在一个实施例中,转换器包括耦合在主电感器和浮动输出的第一导轨之间的辅助二极管以及耦合到主电感器和辅助二极管之间的节点的辅助开关和浮动输出的第二导轨。 当转换器的输入电压至少等于转换器的输出电压,其中辅助开关保持断开并且第一和第二主开关被调制以操作转换器时,转换器可在第一模式下操作。 当转换器的输入电压小于转换器的输出电压时,转换器进一步可操作,其中第一和第二主开关保持闭合,辅助开关被调制以操作转换器。

    Switching network and method of reducing input current total harmonic
distortion associated with a boost converter and a boost converter
employing the switching network or method
    23.
    发明授权
    Switching network and method of reducing input current total harmonic distortion associated with a boost converter and a boost converter employing the switching network or method 失效
    开关网络和降低与升压转换器和采用交换网络或方法的升压转换器相关联的输入电流总谐波失真的方法

    公开(公告)号:US5946203A

    公开(公告)日:1999-08-31

    申请号:US118261

    申请日:1998-07-17

    IPC分类号: H02M1/00 H02M1/42 H02M1/14

    CPC分类号: H02M1/4216 Y02B70/126

    摘要: For use with a boost converter having first, second and third input inductors, a switching network, method of reducing input current total harmonic distortion (THD) associated with the boost converter, and boost converter employing the switching network and method. In one embodiment, the switching network includes a first switch coupled between corresponding rails of the boost converter. The switching network also includes first, second and third L-C resonant networks wye-coupled to a common node and coupled to the first, second and third input inductors, respectively. The first switch and the first, second and third L-C resonant networks cooperate to create resonant voltages across, and induce phase currents through, the first, second and third input inductors to reduce input current THD associated with the boost converter.

    摘要翻译: 用于具有第一,第二和第三输入电感器的升压转换器,开关网络,降低与升压转换器相关联的输入电流总谐波失真(THD)的方法,以及采用开关网络和方法的升压转换器。 在一个实施例中,开关网络包括耦合在升压转换器的相应导轨之间的第一开关。 开关网络还包括分别耦合到公共节点并耦合到第一,第二和第三输入电感器的第一,第二和第三L-C谐振网络。 第一开关和第一,第二和第三L-C谐振网络协作以产生跨越第一,第二和第三输入电感器的谐振电压并且引起相电流,以减小与升压转换器相关联的输入电流THD。

    Control architecture for interleaved converters
    24.
    发明授权
    Control architecture for interleaved converters 失效
    交错转换器的控制架构

    公开(公告)号:US5861734A

    公开(公告)日:1999-01-19

    申请号:US950335

    申请日:1997-10-14

    IPC分类号: H02M3/158 G05F1/10 G05F1/56

    摘要: A control system for an converter circuit using two interleaved boost circuits is described which uses a single PWM controller to control the switches in both of the interleaved boost circuits. A voltage feedback control circuit monitors the output voltage of the converter circuit and sends that information to the PWM controller. A current sensing circuit is provided that senses the current in each of the boost converters. The current sensed in the current sensing circuit is converted to a voltage and used in conjunction with the voltage information from voltage feedback control circuit by the single PWM controller to regulate both of the boost converter switches. By regulating the boost converter switches, the single PWM controller is able to ensure proper synchronization and current sharing while tightly regulating the output voltage and improving the input power factor of the converter circuit.

    摘要翻译: 描述了使用两个交错升压电路的转换器电路的控制系统,其使用单个PWM控制器来控制两个交错升压电路中的开关。 电压反馈控制电路监视转换器电路的输出电压,并将该信息发送给PWM控制器。 提供了感测每个升压转换器中的电流的电流感测电路。 在电流感测电路中感测到的电流被转换成电压,并与来自电压反馈控制电路的电压信息结合使用,由单个PWM控制器调节两个升压转换器开关。 通过调节升压转换器开关,单个PWM控制器能够确保正确的同步和电流共享,同时严格调节输出电压并提高转换器电路的输入功率因数。

    Boost converter having multiple outputs and method of operation thereof
    25.
    发明授权
    Boost converter having multiple outputs and method of operation thereof 失效
    具有多个输出的升压转换器及其操作方法

    公开(公告)号:US5847949A

    公开(公告)日:1998-12-08

    申请号:US946429

    申请日:1997-10-07

    申请人: Yimin Jiang

    发明人: Yimin Jiang

    IPC分类号: H02M3/335 H02M7/08

    CPC分类号: H02M3/33561 Y10T307/707

    摘要: A boost converter for converting an input voltage received at an input thereof into first and second output voltages provided at first and second outputs thereof, respectively, a method of power conversion and a power converter employing the boost converter or the method. In one embodiment, the boost converter includes: (1) a first switching circuit coupled to a first rail of the input and having a first switch and a first capacitor coupled in parallel, (2) a second switching circuit coupled to a second rail of the input and having a second switch and a second capacitor coupled in parallel and (3) a boost inductor, coupled in series between the first switching circuit and the second switching circuit, that provides a conductive path for the input DC voltage to flow serially through the first switching circuit and the second switching circuit to charge the first and second capacitors, respectively.

    摘要翻译: 一种升压转换器,用于将其输入处接收的输入电压分别转换为在其第一和第二输出处提供的第一和第二输出电压,电力转换方法和采用升压转换器的方法的功率转换器。 在一个实施例中,升压转换器包括:(1)耦合到输入的第一导轨的第一开关电路,并具有并联耦合的第一开关和第一电容器,(2)耦合到第二开关 输入并具有并联耦合的第二开关和第二电容器,以及串联耦合在第一开关电路和第二开关电路之间的升压电感器,其提供用于输入DC电压串行流过的导电路径 第一开关电路和第二开关电路分别对第一和第二电容器充电。

    Split-boost circuit having imbalance protection circuitry
    26.
    发明授权
    Split-boost circuit having imbalance protection circuitry 失效
    分压升压电路具有不平衡保护电路

    公开(公告)号:US5689410A

    公开(公告)日:1997-11-18

    申请号:US668173

    申请日:1996-06-21

    申请人: Yimin Jiang

    发明人: Yimin Jiang

    IPC分类号: H02M3/158 H05B37/02

    CPC分类号: H02M3/158 H02M2001/009

    摘要: A rectifier architecture with a split boost circuit having protection circuitry for protecting circuit elements of the split boost. The split boost includes a voltage input terminal, an inductor, two voltage output terminals, a boost diode and branches A and B. Each branch A and B, includes: a switch, a protection circuit, and a capacitor. In a preferred embodiment, the protection circuit is a parallel resistor-diode pair coupled between the capacitor and the switch. The purpose of the protection circuit is to limit circulating current between capacitors when switches in branches A and B are active.

    摘要翻译: 具有分离升压电路的整流器结构,其具有用于保护分流升压的电路元件的保护电路。 分流升压包括电压输入端子,电感器,两个电压输出端子,升压二极管和分支A和B.每个分支A和B包括:开关,保护电路和电容器。 在优选实施例中,保护电路是耦合在电容器和开关之间的并联电阻 - 二极管对。 保护电路的目的是限制分支A和B中的开关处于活动状态时电容器之间的循环电流。

    Method and apparatus for providing higher order modulation that is backwards compatible with quaternary phase shift keying(QPSK) or offset quaternary phase shift keying (OQPSK)
    28.
    发明授权
    Method and apparatus for providing higher order modulation that is backwards compatible with quaternary phase shift keying(QPSK) or offset quaternary phase shift keying (OQPSK) 有权
    用于提供与四相相移键控(QPSK)或偏移四相相移键控(OQPSK)向后兼容的更高阶调制的方法和装置,

    公开(公告)号:US08199847B2

    公开(公告)日:2012-06-12

    申请号:US11879607

    申请日:2007-07-18

    CPC分类号: H04L27/3488 H04L27/183

    摘要: A method and apparatus for providing an asymmetrical backwards compatible communications signal that is capable of being decoded by QPSK and OQPSK receivers as well as PSK and QAM receivers is provided. The invention comprises a timing error accumulator coupled to a first bit stream. The first bit stream includes content that is common to the QPSK/OQPSK receiver and to the PSK/QAM receiver. A phase error accumulator is coupled to a second bit stream and adjusts the phase of symbols in the second bit stream. A phase and timing error compensator is coupled to the phase error accumulator and the timing error accumulator and adjusts the first and second bit streams received from the phase error accumulator and the timing error accumulator in order to reduce timing and phase errors. A higher order modulator coupled to the phase- and timing error compensator is also provided. The higher order modulator processes the first and second bit streams to provide the asymmetrical backwards compatible signal.

    摘要翻译: 提供一种提供能够被QPSK和OQPSK接收机以及PSK和QAM接收机解码的不对称向后兼容通信信号的方法和装置。 本发明包括耦合到第一位流的定时误差累加器。 第一比特流包括对于QPSK / OQPSK接收机和PSK / QAM接收机是共同的内容。 相位误差累加器被耦合到第二比特流并且调整第二比特流中的符号的相位。 相位和定时误差补偿器耦合到相位误差累加器和定时误差累加器,并调整从相位误差累加器和定时误差累加器接收的第一和第二比特流,以减少定时和相位误差。 还提供耦合到相位和定时误差补偿器的较高阶调制器。 高阶调制器处理第一和第二比特流以提供不对称的向后兼容信号。

    Method and apparatus for providing higher order modulation that is backwards compatible with quaternary phase shift keying (QPSK) or offset quaternary phase shift keying (OQPSK)
    29.
    发明授权
    Method and apparatus for providing higher order modulation that is backwards compatible with quaternary phase shift keying (QPSK) or offset quaternary phase shift keying (OQPSK) 有权
    用于提供与四相相移键控(QPSK)或偏移四相相移键控(OQPSK)向后兼容的更高阶调制的方法和装置,

    公开(公告)号:US07260159B2

    公开(公告)日:2007-08-21

    申请号:US10142703

    申请日:2002-05-10

    IPC分类号: H03D3/22 H04L27/22

    CPC分类号: H04L27/3488 H04L27/183

    摘要: A method and apparatus for providing an asymmetrical backwards compatible communications signal that is capable of being decoded by QPSK and OQPSK receivers as well as PSK and QAM receivers is provided. The invention comprises a timing error accumulator coupled to a first bit stream. The first bit stream includes content that is common to the QPSK/OQPSK receiver and to the PSK/QAM receiver. A phase error accumulator is coupled to a second bit stream and adjusts the phase of symbols in the second bit stream. A phase and timing error compensator is coupled to the phase error accumulator and the timing error accumulator and adjusts the first and second bit streams received from the phase error accumulator and the timing error accumulator in order to reduce timing and phase errors. A higher order modulator coupled to the phase and timing error compensator is also provided. The higher order modulator processes the first and second bit streams to provide the asymmetrical backwards compatible signal.

    摘要翻译: 提供一种提供能够被QPSK和OQPSK接收机以及PSK和QAM接收机解码的不对称向后兼容通信信号的方法和装置。 本发明包括耦合到第一位流的定时误差累加器。 第一比特流包括对于QPSK / OQPSK接收机和PSK / QAM接收机是共同的内容。 相位误差累加器被耦合到第二比特流并且调整第二比特流中的符号的相位。 相位和定时误差补偿器耦合到相位误差累加器和定时误差累加器,并调整从相位误差累加器和定时误差累加器接收的第一和第二比特流,以减少定时和相位误差。 还提供耦合到相位和定时误差补偿器的高阶调制器。 高阶调制器处理第一和第二比特流以提供不对称的向后兼容信号。

    Power converter including circuits for improved operational control of synchronous rectifiers therein
    30.
    发明授权
    Power converter including circuits for improved operational control of synchronous rectifiers therein 有权
    电力转换器包括用于改善其中同步整流器的运行控制的电路

    公开(公告)号:US06674658B2

    公开(公告)日:2004-01-06

    申请号:US10062639

    申请日:2002-02-01

    IPC分类号: H02M3335

    CPC分类号: H02M3/33592 Y02B70/1475

    摘要: A power converter device using synchronous rectifiers and method for controlling operation thereof are provided. A first synchronous rectifier is coupled to the secondary transformer winding to pass a voltage induced at the secondary winding in response to an input voltage supplied to the primary transformer winding during an on-state of a main power switch. A first drive circuit is coupled to the gate terminal of the first synchronous rectifier to selectively activate and deactivate the first rectifier in correspondence with the respective on and off states of the main power switch based on a gate voltage supplied by the first drive circuit, with at least one circuit parameter being selected in the first drive circuit for maintaining the gate voltage within a predefined range regardless of variation in the level of the input voltage.

    摘要翻译: 提供了一种使用同步整流器的电力转换装置及其控制方法。 第一同步整流器耦合到次级变压器绕组,以响应于在主电源开关的导通状态期间提供给初级变压器绕组的输入电压,传递在次级绕组处感应的电压。 第一驱动电路耦合到第一同步整流器的栅极端子,以基于由第一驱动电路提供的栅极电压与主电源开关的各自的导通和关断状态对应地选择性地激活和去激活第一整流器, 在第一驱动电路中选择至少一个电路参数,用于将栅极电压维持在预定范围内,而与输入电压电平的变化无关。