摘要:
An integrated three-phase power converter and method of operation thereof is provided. The integrated three-phase power converter includes: (1) first and second power switches coupled between corresponding rails of said power converter, (2) an input stage, including first, second and third L-C branches coupled between said first, second and third phase inputs and a node between said first and second power switches, adapted to receive phase voltages from a source of electrical power, and (3) an output stage, coupled to said first and second power switches, that provides a DC output voltage at said output, said first and second power switches cooperating to employ said input stage to reduce input current total harmonic distortion (THD) on all three of said phase inputs and said output stage to convert said phase voltages to said DC output voltage.
摘要:
A split-boost converter having a main inductor, first and second main switches and floating and fixed outputs and a method of operating the same. In one embodiment, the converter includes an auxiliary diode coupled between the main inductor and a first rail of the floating output, and an auxiliary switch coupled to a node between the main inductor and the auxiliary diode and a second rail of the floating output. The converter is operable in a first mode, when an input voltage of the converter at least equals an output voltage of the converter, in which the auxiliary switch remains open and the first and second main switches are modulated to operate the converter. The converter is further operable in a second mode, when an input voltage of the converter is less than an output voltage of the converter, in which the first and second main switches remain closed and the auxiliary switch is modulated to operate the converter.
摘要:
For use with a boost converter having first, second and third input inductors, a switching network, method of reducing input current total harmonic distortion (THD) associated with the boost converter, and boost converter employing the switching network and method. In one embodiment, the switching network includes a first switch coupled between corresponding rails of the boost converter. The switching network also includes first, second and third L-C resonant networks wye-coupled to a common node and coupled to the first, second and third input inductors, respectively. The first switch and the first, second and third L-C resonant networks cooperate to create resonant voltages across, and induce phase currents through, the first, second and third input inductors to reduce input current THD associated with the boost converter.
摘要:
A control system for an converter circuit using two interleaved boost circuits is described which uses a single PWM controller to control the switches in both of the interleaved boost circuits. A voltage feedback control circuit monitors the output voltage of the converter circuit and sends that information to the PWM controller. A current sensing circuit is provided that senses the current in each of the boost converters. The current sensed in the current sensing circuit is converted to a voltage and used in conjunction with the voltage information from voltage feedback control circuit by the single PWM controller to regulate both of the boost converter switches. By regulating the boost converter switches, the single PWM controller is able to ensure proper synchronization and current sharing while tightly regulating the output voltage and improving the input power factor of the converter circuit.
摘要:
A boost converter for converting an input voltage received at an input thereof into first and second output voltages provided at first and second outputs thereof, respectively, a method of power conversion and a power converter employing the boost converter or the method. In one embodiment, the boost converter includes: (1) a first switching circuit coupled to a first rail of the input and having a first switch and a first capacitor coupled in parallel, (2) a second switching circuit coupled to a second rail of the input and having a second switch and a second capacitor coupled in parallel and (3) a boost inductor, coupled in series between the first switching circuit and the second switching circuit, that provides a conductive path for the input DC voltage to flow serially through the first switching circuit and the second switching circuit to charge the first and second capacitors, respectively.
摘要:
A rectifier architecture with a split boost circuit having protection circuitry for protecting circuit elements of the split boost. The split boost includes a voltage input terminal, an inductor, two voltage output terminals, a boost diode and branches A and B. Each branch A and B, includes: a switch, a protection circuit, and a capacitor. In a preferred embodiment, the protection circuit is a parallel resistor-diode pair coupled between the capacitor and the switch. The purpose of the protection circuit is to limit circulating current between capacitors when switches in branches A and B are active.
摘要:
A digital communications system and method to transmit and receive a digital communications signal wherein the digital signal has a plurality of frames, wherein at least two modulations are supported, and wherein each of the plurality of frames has the same number of symbols.
摘要:
A method and apparatus for providing an asymmetrical backwards compatible communications signal that is capable of being decoded by QPSK and OQPSK receivers as well as PSK and QAM receivers is provided. The invention comprises a timing error accumulator coupled to a first bit stream. The first bit stream includes content that is common to the QPSK/OQPSK receiver and to the PSK/QAM receiver. A phase error accumulator is coupled to a second bit stream and adjusts the phase of symbols in the second bit stream. A phase and timing error compensator is coupled to the phase error accumulator and the timing error accumulator and adjusts the first and second bit streams received from the phase error accumulator and the timing error accumulator in order to reduce timing and phase errors. A higher order modulator coupled to the phase- and timing error compensator is also provided. The higher order modulator processes the first and second bit streams to provide the asymmetrical backwards compatible signal.
摘要:
A method and apparatus for providing an asymmetrical backwards compatible communications signal that is capable of being decoded by QPSK and OQPSK receivers as well as PSK and QAM receivers is provided. The invention comprises a timing error accumulator coupled to a first bit stream. The first bit stream includes content that is common to the QPSK/OQPSK receiver and to the PSK/QAM receiver. A phase error accumulator is coupled to a second bit stream and adjusts the phase of symbols in the second bit stream. A phase and timing error compensator is coupled to the phase error accumulator and the timing error accumulator and adjusts the first and second bit streams received from the phase error accumulator and the timing error accumulator in order to reduce timing and phase errors. A higher order modulator coupled to the phase and timing error compensator is also provided. The higher order modulator processes the first and second bit streams to provide the asymmetrical backwards compatible signal.
摘要:
A power converter device using synchronous rectifiers and method for controlling operation thereof are provided. A first synchronous rectifier is coupled to the secondary transformer winding to pass a voltage induced at the secondary winding in response to an input voltage supplied to the primary transformer winding during an on-state of a main power switch. A first drive circuit is coupled to the gate terminal of the first synchronous rectifier to selectively activate and deactivate the first rectifier in correspondence with the respective on and off states of the main power switch based on a gate voltage supplied by the first drive circuit, with at least one circuit parameter being selected in the first drive circuit for maintaining the gate voltage within a predefined range regardless of variation in the level of the input voltage.