Abstract:
A semiconductor device has a leadframe with a pad and a row of elongated leads with a solderable surfaces in a common plane; a package encapsulating the leadframe with an assembled semiconductor device, leaving the common-plane lead surfaces un-encapsulated and coplanar with the package material between adjacent leads, the row of aligned leads positioned along a package edge; and grooves in the package material cut in the common-plane surface, the grooves extend along a portion of each lead length, have a width and a depth about twice the width, and expose solderable lead surfaces.
Abstract:
Semiconductor device (100) comprises a metallic Quad Flat No-Lead/Small Outline No-Lead QFN/SON-type leadframe (101) with a pad (102) and a plurality of leads (103) with solderable surfaces (101a, 110a), at least one set of leads aligned in a row while having one surface in a common plane (170), each lead of the set having a protrusion (110) shaped as a reduced-thickness metal sheet. A package (160) encapsulates the assembly and the leadframe, the package material shaped by sidewalls (161) with the row of leads positioned along an edge of a sidewall and the protrusions extending away from the package sidewalls, the common-plane lead surfaces and the protrusions remaining un-encapsulated. The protruding metal sheets (110) are solder-attached along with the leads to absorb thermo-mechanical stress.