公开(公告)号：US20180247951A1

公开(公告)日：2018-08-30

申请号：US15691931

申请日：2017-08-31

Applicant: Toshiba Memory Corporation

Inventor： Kotaro FUJII ,  Jun FUJIKI ,  Shinya ARAI

IPC: H01L27/11565 ,  H01L27/1157 ,  H01L27/11582

CPC classification number: H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582

Abstract: A semiconductor memory device includes a semiconductor substrate, a first insulating film provided above the semiconductor substrate, a first conductive film provided above the first insulating film, a plurality of first electrode films provided above the first conductive film and stacked to be separated from each other, a semiconductor member extending in a stacking direction of the plurality of first electrode films, and a charge storage member provided between the semiconductor member and one of the plurality of first electrode films. The first conductive film includes a main portion disposed at least below the plurality of first electrode films, and a fine line portion extending from the main portion toward an end surface side of the semiconductor substrate. A width of the fine line portion is narrower than a width of the main portion.