公开(公告)号：US20200279949A1

公开(公告)日：2020-09-03

申请号：US16877505

申请日：2020-05-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Hsiung Tsai ,  Chien-Tai Chan ,  Ziwei Fang ,  Kei-Wei Chen ,  Huai-Tei Yang

IPC: H01L29/78 ,  H01L21/223 ,  H01L21/265 ,  H01L29/66

Abstract: A FinFET device and a method of forming the same are disclosed. In accordance with some embodiments, a FinFET device includes a substrate having at least one fin, a gate stack across the at least one fin, a strained layer aside the gate stack and a silicide layer over the strained layer. The strained layer has a boron surface concentration greater than about 2E20 atom/cm3 within a depth range of about 0-5 nm from a surface of the strained layer.

公开(公告)号：US20180366585A1

公开(公告)日：2018-12-20

申请号：US16112766

申请日：2018-08-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun Hsiung Tsai ,  Chien-Tai Chan ,  Ziwei Fang ,  Kei-Wei Chen ,  Huai-Tei Yang

IPC: H01L29/78 ,  H01L21/223 ,  H01L29/66 ,  H01L21/265

CPC classification number: H01L29/7848 ,  H01L21/2236 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/28518 ,  H01L21/76897 ,  H01L29/66492 ,  H01L29/665 ,  H01L29/66795 ,  H01L29/7834 ,  H01L29/785

Abstract: A FinFET device and a method of forming the same are disclosed. In accordance with some embodiments, a FinFET device includes a substrate having at least one fin, a gate stack across the at least one fin, a strained layer aside the gate stack and a silicide layer over the strained layer. The strained layer has a boron surface concentration greater than about 2E20 atom/cm3 within a depth range of about 0-5 nm from a surface of the strained layer.

公开(公告)号：US09722081B1

公开(公告)日：2017-08-01

申请号：US15009834

申请日：2016-01-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun Hsiung Tsai ,  Chien-Tai Chan ,  Ziwei Fang ,  Kei-Wei Chen ,  Huai-Tei Yang

IPC: H01L21/4763 ,  H01L29/78 ,  H01L21/265 ,  H01L21/223 ,  H01L29/66

CPC classification number: H01L29/7848 ,  H01L21/2236 ,  H01L21/26506 ,  H01L21/26513 ,  H01L29/66492 ,  H01L29/665 ,  H01L29/7834 ,  H01L29/785

Abstract: A FinFET device and a method of forming the same are disclosed. In accordance with some embodiments, a FinFET device includes a substrate having at least one fin, a gate stack across the at least one fin, a strained layer aside the gate stack and a silicide layer over the strained layer. The strained layer has a boron surface concentration greater than about 2E20 atom/cm3 within a depth range of about 0-5 nm from a surface of the strained layer.

公开(公告)号：US09537010B2

公开(公告)日：2017-01-03

申请号：US14613663

申请日：2015-02-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Tsan-Chun Wang ,  Ziwei Fang ,  Chien-Tai Chan ,  Da-Wen Lin ,  Huicheng Chang

IPC: H01L21/336 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/66 ,  H01L21/266 ,  H01L21/324

CPC classification number: H01L29/7856 ,  H01L21/2253 ,  H01L21/266 ,  H01L21/324 ,  H01L29/66795

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a doped region in an upper portion of the substrate. The doped region is doped with first dopants of a first conduction type. The semiconductor device structure includes one fin structure over the substrate. A first dopant concentration of the doped region exposed by the fin structure is greater than a second dopant concentration of the doped region covered by the fin structure. The semiconductor device structure includes an isolation layer over the substrate and at two opposite sides of the fin structure. The semiconductor device structure includes a gate over the isolation layer and the fin structure.

Abstract translation: 提供半导体器件结构。 半导体器件结构包括在衬底的上部具有掺杂区的衬底。 掺杂区域掺杂有第一导电类型的第一掺杂剂。 半导体器件结构包括在衬底上的一个鳍结构。 通过鳍结构暴露的掺杂区域的第一掺杂剂浓度大于由鳍结构覆盖的掺杂区域的第二掺杂剂浓度。 半导体器件结构包括在衬底上并在鳍结构的两个相对侧的隔离层。 半导体器件结构包括隔离层上的栅极和鳍结构。

公开(公告)号：US09129988B1

公开(公告)日：2015-09-08

申请号：US14555439

申请日：2014-11-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Yang Lee ,  Ting-Yeh Chen ,  Chia-Ling Chan ,  Chien-Tai Chan

IPC: H01L21/00 ,  H01L29/66

CPC classification number: H01L29/7851 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7834 ,  H01L29/785

Abstract: A FinFET includes a fin structure, a gate and a source-drain region. The fin structure is over a substrate and has a recess of an upper surface of the fin structure and a doped region in the fin structure and adjacent to the recess. The gate protrudes from the recess and across over the fin structure. The source-drain region is in the fin structure and adjacent to the doped region. Methods for forming the FinFET are also provided.

Abstract translation: FinFET包括鳍结构，栅极和源极 - 漏极区域。 翅片结构在衬底之上，并且具有翅片结构的上表面的凹部和鳍结构中的与凹部相邻的掺杂区域。 门从凹槽突出并跨过翅片结构。 源极 - 漏极区域处于鳍状结构并且与掺杂区域相邻。 还提供了形成FinFET的方法。