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    Robust and high-speed memory access with adaptive interface timing
    21.
    发明授权
    Robust and high-speed memory access with adaptive interface timing 有权
    强大的高速存储器访问，具有自适应接口时序

    公开(公告)号：US07061804B2

    公开(公告)日：2006-06-13

    申请号：US10993034

    申请日：2004-11-18

    申请人： Dexter Tamio Chun ,  Ajit Patil ,  Ian Huang ,  Jason Chan ,  Timothy Gold

    发明人： Dexter Tamio Chun ,  Ajit Patil ,  Ian Huang ,  Jason Chan ,  Timothy Gold

    IPC分类号： G11C11/34

    CPC分类号： G11C29/028 ,  G06F9/4403 ,  G06F9/44505 ,  G06F11/1068 ,  G11C7/1006 ,  G11C7/1045 ,  G11C7/22 ,  G11C16/04 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/32 ,  G11C29/42 ,  G11C29/50 ,  G11C29/50012 ,  G11C2216/14

    摘要： Techniques for quickly and reliably accessing a memory device (e.g., a NAND Flash memory) with adaptive interface timing are described. For memory access with adaptive interface timing, the NAND Flash memory is accessed at an initial memory access rate, which may be the rate predicted to achieve reliable memory access. Error correction coding (ECC), which is often employed for NAND Flash memory, is then used to ensure reliable access of the NAND Flash. For a read operation, one page of data is read at a time from the NAND Flash memory, and the ECC determines whether the page read from the NAND Flash memory contains any errors. If errors are encountered, then a slower memory access rate is selected, and the page with error is read again from the NAND Flash memory at the new rate. The techniques may be used to write data to the NAND Flash memory.

    摘要翻译： 描述了利用自适应接口定时快速可靠地访问存储器件（例如，NAND闪存）的技术。 对于具有自适应接口定时的存储器访问，NAND闪存以初始存储器访问速率访问，其可以是预测的速率以实现可靠的存储器访问。 然后，通常用于NAND闪存的纠错编码（ECC）用于确保NAND闪存的可靠访问。 对于读取操作，从NAND闪速存储器一次读取一页数据，并且ECC确定从NAND闪速存储器读取的页面是否包含任何错误。 如果遇到错误，则选择较慢的存储器访问速率，并以新的速率从NAND闪存再次读取带有错误的页面。 这些技术可以用于将数据写入NAND闪存。