公开(公告)号：US20170184972A1

公开(公告)日：2017-06-29

申请号：US15381321

申请日：2016-12-16

Applicant: Tokyo Electron Limited

Inventor： Hidetami Yaegashi

IPC: G03F7/32

Abstract: Provided is a method for forming a hole pattern in a resist film. The method includes forming a resist film on a workpiece; exposing the resist film using a bright field mask; removing an unexposed portion of the resist film by supplying a first developer to the resist film and performing a negative development after the exposing the resist film; modifying a sidewall portion of the resist film after the removing the unexposed portion of the resist film; and removing an exposed portion of the resist film by supplying a second developer to the resist film and performing a positive development after the modifying the sidewall portion of the resist film. The modifying the sidewall portion of the resist film is a processing of reducing solubility of the sidewall portion of the resist film in the second developer.

公开(公告)号：US09653293B2

公开(公告)日：2017-05-16

申请号：US14619554

申请日：2015-02-11

Applicant: TOKYO ELECTRON LIMITED

Inventor： Hidetami Yaegashi

IPC: G03F7/20 ,  H01L21/027 ,  H01L21/67 ,  H01L21/311

CPC classification number: H01L21/0274 ,  G03F7/2024 ,  H01L21/31144 ,  H01L21/67178 ,  H01L21/67225

Abstract: A manufacturing a semiconductor device of the present disclosure includes coating a photosensitive material on a workpiece; exposing the photosensitive material using a first exposure mask; performing a positive-tone development on the photosensitive material using a first developer after the first exposing; exposing the photosensitive material using a second exposure mask after the first developing; and performing a negative-tone development on the photosensitive material using a second developer after the second exposing.