公开(公告)号：US20110171129A1

公开(公告)日：2011-07-14

申请号：US13050672

申请日：2011-03-17

申请人： Nobuya Inagaki ,  Hideo Saji ,  Kentaro Toyoda ,  Hiroyuki Kimura ,  Konomu Hirao ,  Kenji Nagakawa

发明人： Nobuya Inagaki ,  Hideo Saji ,  Kentaro Toyoda ,  Hiroyuki Kimura ,  Konomu Hirao ,  Kenji Nagakawa

IPC分类号： A61K51/08 ,  C07K14/00 ,  C07K1/13

CPC分类号： A61K51/088 ,  A61K51/08

摘要： A precursor of a molecular probe for imaging of pancreatic islets is provided. The precursor includes a polypeptide represented by any one of the following formulae (1) to (12), or a polypeptide having a homology with the foregoing polypeptide: *-DLSKQMEEEAVRLFIEWLK*NGGPSSGAPPPS-NH2 (1) *-LSKQMEEEAVRLFIEWLK*NGGPSSGAPPPS-NH2 (2) *-SKQMEEEAVRLFIEWLK*NGGPSSGAPPPS-NH2 (3) *-KQMEEEAVRLFIEWLK*NGGPSSGAPPPS-NH2 (4) *-DLSK*QMEEEAVRLFIEWLKNGGPSSGAPPPS-NH2 (5) *-LSK*QMEEEAVRLFIEWLKNGGPSSGAPPPS-NH2 (6) *-SK*QMEEEAVRLFIEWLKNGGPSSGAPPPS-NH2 (7) *-K*QMEEEAVRLFIEWLKNGGPSSGAPPPS-NH2 (8) DLSK*QMEEEAVRLFIEWLK*NGGPSSGAPPPS-NH2 (9) LSK*QMEEEAVRLFIEWLK*NGGPSSGAPPPS-NH2 (10) SK*QMEEEAVRLFIEWLK*NGGPSSGAPPPS-NH2 (11) K*QMEEEAVRLFIEWLK*NGGPSSGAPPPS-NH2 (12)

摘要翻译： 提供了用于胰岛成像的分子探针的前体。 前体包括由下列通式（1）至（12）中的任一个表示的多肽或与前述多肽具有同源性的多肽：* -DLSKQMEEEAVRLFIEWLK * NGGPSSGAPPPS-NH2（1）* -LSKQMEEEAVRLFIEWLK * NGGPSSGAPPPS-NH2（ 2）* -SKQMEEEAVRLFIEWLK * NGGPSSGAPPPS-NH2（3）* -KQMEEEAVRLFIEWLK * NGGPSSGAPPPS-NH2（4）* -DLSK * QMEEEAVRLFIEWLKNGGPSSGAPPPS-NH2（5）* -LSK * QMEEEAVRLFIEWLKNGGPSSGAPPPS-NH2（6）* -SK * QMEEEAVRLFIEWLKNGGPSSGAPPPS-NH2 7）* -K * QMEEEAVRLFIEWLKNGGPSSGAPPPS-NH2（8）DLSK * QMEEEAVRLFIEWLK * NGGPSSGAPPPS-NH2（9）LSK * QMEEEAVRLFIEWLK * NGGPSSGAPPPS-NH2（10）SK * QMEEEAVRLFIEWLK * NGGPSSGAPPPS-NH2（11）K * QMEEEAVRLFIEWLK * NGGPSSGAPPPS-NH2 12）

公开(公告)号：US20110111851A1

公开(公告)日：2011-05-12

申请号：US12729730

申请日：2010-03-23

申请人： Koichi HAYASHIDA ,  Haruka Kakinuma ,  Shigeru Miyamoto ,  Takashi Tezuka ,  Hiroyuki Kimura ,  Shigeyuki Asuke ,  Yusuke Amano

发明人： Koichi HAYASHIDA ,  Haruka Kakinuma ,  Shigeru Miyamoto ,  Takashi Tezuka ,  Hiroyuki Kimura ,  Shigeyuki Asuke ,  Yusuke Amano

IPC分类号： A63F9/24

CPC分类号： A63F13/422 ,  A63F13/211 ,  A63F13/497 ,  A63F13/67 ,  A63F13/95 ,  A63F2300/1018 ,  A63F2300/105 ,  A63F2300/1087 ,  A63F2300/6027 ,  A63F2300/6054 ,  A63F2300/634 ,  A63F2300/8047

摘要： Manual operation means controls a motion of an operation target character in accordance with operation data outputted from an input device. Automatic motion control means controls the motion of the operation target character in accordance with a series of pieces of operation data which are prepared in advance. Game control means performs a first process when a first condition is satisfied as a result of control of the motion of the operation target character by the manual operation means only in a predetermined interval in a game in progress, performs a second process which is different from the first process when a second condition is satisfied, and executes the first when the control of the motion is performed by the automatic motion control means in at least a part of the interval regardless of whichever condition is satisfied.

摘要翻译： 手动操作装置根据从输入装置输出的操作数据来控制操作对象角色的运动。 自动运动控制装置根据预先准备的一系列操作数据来控制操作对象角色的运动。 游戏控制装置仅当在正在进行的游戏的预定间隔中由手动操作装置控制操作对象角色的运动而满足第一条件时执行第一处理，执行不同于 当满足第二条件时的第一处理，并且当在自动运动控制装置的至少一部分时间内执行运动的控制时执行第一处理，而不管满足哪个条件。

公开(公告)号：US20110064227A1

公开(公告)日：2011-03-17

申请号：US12840726

申请日：2010-07-21

申请人： Osamu Kawamae ,  Toshifumi Takeuchi ,  Hiroyuki Kimura ,  Takao Arai ,  Hiroshi Yoshiura

发明人： Osamu Kawamae ,  Toshifumi Takeuchi ,  Hiroyuki Kimura ,  Takao Arai ,  Hiroshi Yoshiura

IPC分类号： H04K1/04

CPC分类号： H04N21/4367 ,  G11B20/00086 ,  G11B20/00188 ,  G11B20/00195 ,  G11B20/0021 ,  G11B20/00224 ,  G11B20/00304 ,  G11B20/00449 ,  G11B20/00739 ,  G11B20/00753 ,  G11B20/00768 ,  G11B20/00884 ,  H04K1/00 ,  H04L9/32 ,  H04L2209/603 ,  H04N5/765 ,  H04N5/77 ,  H04N5/775 ,  H04N5/781 ,  H04N5/85 ,  H04N5/913 ,  H04N9/8042 ,  H04N21/4405 ,  H04N2005/91328 ,  H04N2005/91335 ,  H04N2005/91364

摘要： A system effecting a data reproducing method for a plurality of devices, for sending and receiving data by authenticating the plurality of devices with each other, said data reproducing method including: selecting, from a plurality of descrambling methods, a descrambling method corresponding to a type of said data, executing authentication by an authenticating method corresponding to the selected descrambling method, where the authenticating method is selected from a plurality of authenticating methods, and reproducing said data.

摘要翻译： 一种影响多个设备的数据再现方法的系统，用于通过彼此认证多个设备来发送和接收数据，所述数据再现方法包括：从多个解扰方法中选择对应于类型的解扰方法 的所述数据，通过与所选择的解扰方法相对应的认证方法执行认证，其中从多种认证方法中选择认证方法，并再现所述数据。

公开(公告)号：US07907072B1

公开(公告)日：2011-03-15

申请号：US12552289

申请日：2009-09-02

申请人： Hiroyuki Kimura

发明人： Hiroyuki Kimura

IPC分类号： H03M1/66

CPC分类号： H03M1/745

摘要： A DAC unit, connected to a current supply transistor, includes first control transistors connected in parallel to each other, with each being connected in series to the current supply transistor. The first control transistors drive currents at different current values in response to a bias voltage. The DAC unit also includes second control transistors connected in parallel to each other, with each being connected in series to the current supply transistor. Each second control transistor drives the current having the same current value as one of the first control transistors in response to the single bias voltage. The first and second control transistors driving the currents having the same current value operate in a complementary manner based on part of a digital code. The DAC unit generates an output current by selectively combining at least one of the currents driven by the first control transistors.

摘要翻译： 连接到电流源晶体管的DAC单元包括彼此并联连接的第一控制晶体管，每个控制晶体管与电流源晶体管串联连接。 第一控制晶体管响应偏置电压驱动不同电流值的电流。 DAC单元还包括彼此并联连接的第二控制晶体管，每个晶体管串联连接到电流源晶体管。 每个第二控制晶体管响应于单个偏置电压驱动具有与第一控制晶体管中的一个相同的电流值的电流。 驱动具有相同电流值的电流的第一和第二控制晶体管基于数字代码的一部分以互补的方式工作。 DAC单元通过选择性地组合由第一控制晶体管驱动的至少一个电流来产生输出电流。

公开(公告)号：US07786713B2

公开(公告)日：2010-08-31

申请号：US11854546

申请日：2007-09-13

申请人： Hiroyuki Kimura

发明人： Hiroyuki Kimura

IPC分类号： G05F1/565

CPC分类号： G05F1/56

摘要： A series regulator circuit for reducing current consumption, enabling switching between different current consumption modes, and suppressing output voltage fluctuations. A constant current source 20, connected to an input voltage line, is connected to a ground voltage line via a resistor element 21 and transistor B1. Gate terminals of transistors M2, M4 are connected between the constant current source 20 and transistor B1. The transistor M2 is connected to the input voltage line via a transistor M1 activated in a high current mode. The source terminals of the transistors M2, M4 function as the series regulator circuit output terminal, which is connected to the ground voltage line via a resistor element 23 and transistor M3, activated in a high current mode, or via resistor elements 24, 25. A connection node between the resistor elements 24, 25 is connected to a base voltage of the transistor B1.

摘要翻译： 一种用于降低电流消耗的串联调节器电路，能够在不同的电流消耗模式之间进行切换，并抑制输出电压波动。 连接到输入电压线的恒流源20通过电阻元件21和晶体管B1连接到地电压线。 晶体管M2，M4的栅极端子连接在恒流源20和晶体管B1之间。 晶体管M2通过在高电流模式下被激活的晶体管M1连接到输入电压线。 晶体管M2，M4的源极端子作为串联调节器电路输出端子起作用，其通过电阻器元件23和晶体管M3连接到接地电压线路，以高电流模式激活，或通过电阻器元件24,25。 电阻元件24,25之间的连接节点连接到晶体管B1的基极电压。

公开(公告)号：US07764123B2

公开(公告)日：2010-07-27

申请号：US12325273

申请日：2008-12-01

申请人： Hiroyuki Kimura

发明人： Hiroyuki Kimura

IPC分类号： H03F3/18

CPC分类号： H03F3/505 ,  H03F3/3016 ,  H03F2200/297 ,  H03F2200/513

摘要： A buffer amplifier having a wide output voltage range includes a first source follower circuit having a first current source and a first transistor, and a second source follower circuit having a second current source and a second transistor. The first source follower circuit has an output terminal connected to a gate of a third transistor and a source of a fourth transistor. The second source follower circuit has an output terminal connected to a gate of a fifth transistor and a source of a sixth transistor. First and second voltages are respectively supplied to the gates of the fourth and sixth transistors. The sixth transistor is operated in place of the fifth transistor in a low voltage range, and the fourth transistor is operated in place of the third transistor in a high voltage range.

摘要翻译： 具有宽输出电压范围的缓冲放大器包括具有第一电流源和第一晶体管的第一源极跟随器电路和具有第二电流源和第二晶体管的第二源极跟随器电路。 第一源极跟随器电路具有连接到第三晶体管的栅极和第四晶体管的源极的输出端子。 第二源极跟随器电路具有连接到第五晶体管的栅极和第六晶体管的源极的输出端子。 第一和第二电压分别提供给第四和第六晶体管的栅极。 第六晶体管代替第五晶体管而在低电压范围内工作，第四晶体管代替第三晶体管工作在高电压范围。

公开(公告)号：US20100009433A1

公开(公告)日：2010-01-14

申请号：US12496059

申请日：2009-07-01

申请人： Hiroyuki Kimura

发明人： Hiroyuki Kimura

IPC分类号： C12M1/00

CPC分类号： C12M41/36 ,  C12M29/06 ,  C12M41/14

摘要： The problem of a specimen being vibrated during supply or drainage of a liquid such as a culture solution can be avoided, thus allowing acquisition of a stable image. The invention provides a culturing system including a main container having an opening facing upward, accommodating a culture vessel containing a biological specimen, and having an inner space maintained at a predetermined incubation environment; and a nozzle fixed to the main container and inserted into the culture vessel through the opening of the culture vessel to supply or drain a liquid into or from the culture vessel. The main container includes a transparent portion through which the biological specimen in the main container can be externally observed.

摘要翻译： 可以避免样品在诸如培养液的液体的供给或排出期间振动的问题，从而可以获得稳定的图像。 本发明提供一种培养系统，包括：主容器，其具有面向上的开口，容纳含有生物样本的培养容器，并具有保持在预定孵育环境的内部空间; 以及固定在主容器上的喷嘴，并通过培养容器的开口插入培养容器中，以将液体供入或排出培养容器。 主容器包括透明部分，可以从外部观察主容器中的生物样本。

公开(公告)号：US07495939B2

公开(公告)日：2009-02-24

申请号：US11557388

申请日：2006-11-07

申请人： Hiroyuki Kimura

发明人： Hiroyuki Kimura

IPC分类号： H02M1/14

CPC分类号： H02M1/15

摘要： A ripple filter circuit for ensuring the driving of a driving subject while efficiently eliminating ripple even when the operational voltage margin is small. A first transistor, which is connected to a power supply voltage line, is connected to a ground line via a load of the driving subject. A second transistor, which has substantially the same characteristics as the first transistor, and a dummy load are arranged between the power supply voltage line and the ground line. An operational amplifier includes an inverting input terminal, connected between the second transistor and the dummy load, and a non-inverting terminal at which the voltage is decreased by a predetermined voltage from the power supply voltage. The operational amplifier also includes an output connected to the gate terminal of the second transistor and to the gate terminal of the first transistor via a lowpass filter.

摘要翻译： 波纹滤波器电路，用于确保驱动对象的驱动，同时即使当操作电压裕度小时也有效地消除纹波。 连接到电源电压线的第一晶体管通过驱动对象的负载连接到接地线。 具有与第一晶体管基本相同的特性的第二晶体管和虚设负载设置在电源电压线和接地线之间。 运算放大器包括连接在第二晶体管和虚拟负载之间的反相输入端子和电压从电源电压降低预定电压的同相端子。 运算放大器还包括经由低通滤波器连接到第二晶体管的栅极端子和第一晶体管的栅极端子的输出。

公开(公告)号：US07443256B2

公开(公告)日：2008-10-28

申请号：US11775230

申请日：2007-07-10

申请人： Hiroyuki Kimura

发明人： Hiroyuki Kimura

IPC分类号： H03K3/282

CPC分类号： H03K4/50

摘要： An oscillator circuit having a relatively simple circuit structure while enabling full swing with low power consumption includes an oscillation core block, a voltage restriction block, and a differential output block. Drain terminals of first and second transistors are each connected to the voltage restriction block. The voltage restriction block restricts the amplitude of an oscillation signal to a reference voltage. Source terminals of third and fourth transistors are connected to drain terminals of fifth and sixth transistors, and source terminals of seventh and eighth transistors are connected to drain terminals of ninth and tenth transistors. This supplies the differential output block with current generated by the amplitude restriction. The differential output block converts the current into drive voltage to ground voltage to perform full swing.

摘要翻译： 具有相对简单的电路结构同时能够实现全功能低功耗的振荡器电路包括振荡磁芯块，电压限制块和差分输出块。 第一和第二晶体管的漏极端子都连接到电压限制块。 电压限制块将振荡信号的幅度限制为参考电压。 第三和第四晶体管的源极端子连接到第五和第六晶体管的漏极端子，第七和第八晶体管的源极端子连接到第九和第十晶体管的漏极端子。 由差分输出块提供由幅度限制产生的电流。 差分输出块将电流转换为驱动电压至地电压，以进行全速摆幅。

公开(公告)号：US20080258696A1

公开(公告)日：2008-10-23

申请号：US11854546

申请日：2007-09-13

申请人： Hiroyuki Kimura

发明人： Hiroyuki Kimura

IPC分类号： G05F1/00

CPC分类号： G05F1/56

摘要： A series regulator circuit for reducing current consumption, enabling switching between different current consumption modes, and suppressing output voltage fluctuations. A constant current source 20, connected to an input voltage line, is connected to a ground voltage line via a resistor element 21 and transistor B1. Gate terminals of transistors M2, M4 are connected between the constant current source 20 and transistor B1. The transistor M2 is connected to the input voltage line via a transistor M1 activated in a high current mode. The source terminals of the transistors M2, M4 function as the series regulator circuit output terminal, which is connected to the ground voltage line via a resistor element 23 and transistor M3, activated in a high current mode, or via resistor elements 24, 25. A connection node between the resistor elements 24, 25 is connected to a base voltage of the transistor B1.

摘要翻译： 一种降低电流消耗的串联调节电路，可实现不同电流消耗模式之间的切换，并抑制输出电压波动。 连接到输入电压线的恒定电流源20经由电阻元件21和晶体管B1连接到接地电压线。 晶体管M 2，M 4的栅极端子连接在恒流源20和晶体管B1之间。 晶体管M 2通过以高电流模式激活的晶体管M 1连接到输入电压线。 晶体管M 2，M 4的源极端子用作串联调节器电路输出端子，其经由电阻器元件23和晶体管M 3连接到接地电压线，以高电流模式激活，或通过电阻器元件24 ，25。 电阻元件24,25之间的连接节点连接到晶体管B1的基极电压。