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公开(公告)号：US20200380927A1
公开(公告)日：2020-12-03
申请号：US16613423
申请日：2019-10-18
Inventor： Fei AI
IPC: G09G3/36
Abstract: The present disclosure proposes a multiplex LCD driving circuit. By setting a new circuit structure, adjacent display pixels of the same color are opposite in polarity in the same row of subpixels. In this way, half of the data lines are applied with positive polarity voltage and half of the data line are applied with negative polarity voltage. Capacitance couplings between the data lines and the common electrodes are balanced off each other, which resolves the display picture abnormality caused by the coupling capacitance between the data line and the common electrode in the LTPS-LCD product.
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22.发明申请公开(公告)号：US20200249519A1
公开(公告)日：2020-08-06
申请号：US16475379
申请日：2019-03-14
Inventor： Fei AI , Peng LU , Chengzhi LUO
IPC: G02F1/1335 , G02F1/1368 , G02F1/1333 , H01L27/12
Abstract: A manufacturing method for a liquid crystal display panel is disclosed and includes a step forming a refractive index gradient layer, a step forming a gate electrode insulation layer, a step forming a first interlayer dielectric layer, and a step forming a second interlayer dielectric layer. The step forming a refractive index gradient layer includes depositing a silicon nitride layer on a glass substrate, depositing the refractive index gradient layer on the silicon nitride layer. The refractive index gradient layer is silicon oxide, and includes a lower refractive index decremental layer and a lower refractive index constant layer. A refractive index of the decremental layer gradually decreases along a direction away from the silicon nitride layer, the lower refractive index constant layer is on the lower refractive index decremental layer. A reflection rate between light in film layers can be lowered to improve light transmittance of the display panel.
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公开(公告)号：US20250098307A1
公开(公告)日：2025-03-20
申请号：US18567221
申请日：2023-09-26
Inventor： Haiming CAO , Chao TIAN , Shiyu LONG , Chunpeng ZHANG , Fei AI , Chungching HSIEH , Jianfeng YUAN
IPC: H01L27/12 , G02F1/1368 , H01L29/786
Abstract: An array substrate, a display panel, and a display device are provided. The array substrate includes a base; a buffer layer and a thin film transistor. The buffer layer is provided on the base and includes a first buffer layer and a second buffer layer. The first buffer layer is disposed between the second buffer layer and the base. A refractive index of the first buffer layer is greater than a refractive index of the base and a refractive index of the second buffer layer. A ratio of the refractive index of the first buffer layer to the refractive index of the base is less than or equal to 1.25. The thin film transistor is provided on a side of the buffer layer away from the base.
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公开(公告)号：US20250087124A1
公开(公告)日：2025-03-13
申请号：US18249250
申请日：2023-02-28
Inventor： Mingyue LI , Chao TIAN , Fei AI
Abstract: The present application discloses a display panel, the display panel includes an active area and a irregular-shaped area, the active area includes a first active area disposed at at least one side of the irregular-shaped area and a second active area connected with the first active area. The first signal line is disposed in the second active area, the second signal line is disposed in the first active area, the first signal line and the second signal line extend in a same direction, and the length of the first signal line is larger than the length of the second signal line, and at least one of a plurality of the compensation units is connected with the second signal line.
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公开(公告)号：US20250081755A1
公开(公告)日：2025-03-06
申请号：US18561180
申请日：2023-06-30
Inventor： Fei AI , Dewei SONG , Chengzhi LUO
IPC: H10K59/123 , H10K59/121 , H10K59/124
Abstract: A display panel and an electronic terminal are provided, including a substrate and a first thin film transistor (TFT) disposed on the substrate. The first TFT includes a first active portion, and a first source and a first drain which are arranged on two ends of the first active portion and electrically connected to the two ends. The display panel also includes a pixel electrode layer arranged on a first source-drain portion and electrically connected to the first drain. A material of the first drain includes a transparent conductive material.
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Patent Agency Ranking
公开(公告)号：US20250081522A1
公开(公告)日：2025-03-06
申请号：US18560932
申请日：2023-06-29
Inventor： Zhifu LI , Guanghui LIU , Fei AI , Dewei SONG , Chengzhi LUO
IPC: H01L29/786 , H01L29/10
Abstract: The present application provides a thin film transistor and an electronic device thereof. An active layer of the thin film transistor includes: a first active layer, a channel layer and a second active layer that are stacked, the first active layer includes a first doped portion and a second doped portion, the first doped portion is connected to the channel layer and the second doped portion, and a concentration of dopant ions in the first doped portion is less than a concentration of dopant ions in the second doped portion. The leakage current is reduced, and the mobility in the “channel region” of the thin film transistor is improved.
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公开(公告)号：US20240363758A1
公开(公告)日：2024-10-31
申请号：US18247554
申请日：2023-02-28
Inventor： Zhifu LI , Guanghui LIU , Chao DAI , Fei AI , Dewei SONG , Zhuang LI
IPC: H01L29/786 , H01L29/417
CPC classification number: H01L29/78603 , H01L29/41733 , H01L29/78633 , H01L29/78696
Abstract: A display panel is provided by embodiments of the present application, a thin film transistor includes: a first gate electrode including a first side slope, a second side slope oppositely arranged, and a top surface; a first gate insulating layer covering the first gate electrode; a semiconductor layer arranged on the first gate insulating layer, wherein the semiconductor layer includes a first end, a second end, and a channel arranged between the first end and the second end, the second end is at least partially on the top surface, the channel is at least partially located on the first side slope.
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公开(公告)号：US20240363640A1
公开(公告)日：2024-10-31
申请号：US18522308
申请日：2023-11-29
Inventor： Fei AI , Dewei SONG , Chengzhi LUO
IPC: H01L27/12
CPC classification number: H01L27/1222 , H01L27/124
Abstract: A display panel and a display device are provided. The display panel includes: an active layer, a gate, and a gate auxiliary structure. The active layer is disposed along a first direction and includes a channel layer. The gate is disposed above the channel layer and a width of the gate along the first direction is equal to a length of the channel layer along the first direction. The gate auxiliary structure is disposed adjacent to the gate. The width of the gate along the first direction is less than 1 micrometer.
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公开(公告)号：US20240152010A1
公开(公告)日：2024-05-09
申请号：US17776384
申请日：2022-04-13
Inventor： Fan GONG , Guanghui LIU , Fei AI , Jiyue SONG , Dewei SONG , Rui HE
IPC: G02F1/1362 , G02F1/1368
CPC classification number: G02F1/136209 , G02F1/136222 , G02F1/1368
Abstract: Embodiments of the present disclosure provide a display panel and a display terminal. The display panel includes at least one ultraviolet sensing transistor and at least one control transistor disposed on a substrate, and a color film substrate including a light blocking unit; wherein the ultraviolet sensing transistor includes an ultraviolet absorbing layer, and an orthographic projection of the light blocking unit on the substrate covers an orthographic projection of the ultraviolet absorbing layer on the substrate. According to the embodiment of the present disclosure, the light blocking unit absorbs or blocks the visible lights to prevent the visible lights from entering into the ultraviolet absorbing layer.
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公开(公告)号：US20240029609A1
公开(公告)日：2024-01-25
申请号：US17441303
申请日：2021-08-06
Inventor： Haiming CAO , Chao TIAN , Yanqing GUAN , Fei AI , Guanghui LIU
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2310/0267 , G09G2310/08 , G09G2320/045
Abstract: A gate drive circuit and a display panel are provided. A pull-up module and a pull-down module of the gate drive circuit output a constant-voltage high potential to a second node, a third node, and a n-th stage gate drive signal through a P-type thin film transistor and output constant-voltage low potential through a N-type thin film transistor to the second node, the third node, and an n-th gate drive signal, thereby improving the stability of the output signal of the thin film transistor connected to the gate drive circuit and the key node.
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