摘要:
In an image display apparatus including a display unit for displaying an image of an inputted video signal thereon with a predetermined field frequency and a predetermined number of scanning lines using vertical and horizontal synchronizing signals for deflection of display in response to the inputted video signal, a first converter converts an inputted first video signal having a first field frequency which is lower than the predetermined field frequency and having the predetermined number of scanning lines, into an output second video signal having the predetermined field frequency and the predetermined number of scanning lines, and outputs the output second video signal to the display unit. Further, a second convertor converts an inputted third video signal, having a first number of scanning lines which is smaller than the predetermined number of scanning lines and having the predetermined field frequency, into an output fourth video signal having the predetermined field frequency and the predetermined number of scanning lines, and outputs the output fourth video signal to the display unit. The apparatus includes asynchronous synchronizing signals and a timing correction circuit.
摘要:
An image display device includes: an interpolation phase generator that generates an interpolation phase on the basis of downsampling frame information representing a downsampling timing at which at least one frame image of the image signal is thinned, and an interpolation frame generator that generates an interpolation frame image corresponding to the interpolation phase. The interpolation phase generator generates the interpolation phase such that a phase distance between a first interpolation frame image from among a plurality of interpolation frame images within one period of downsampling periods, and a second interpolation frame image that follows the first interpolation frame image becomes equal to a phase distance between mutually adjacent interpolation frame images obtained when phase distances between a plurality of interpolation frame images are equalized within one period of the downsampling periods.
摘要:
A video signal processing device includes: a stereo conversion unit which generates a stereo superimposed signal by performing stereo conversion processing on a superimposed signal obtained by superimposing, on a two-dimensional video signal, an additional information signal indicating additional information to be combined with a two-dimensional video and displayed, and shifts a first locating signal indicating a position of the additional information in the two-dimensional video, according to an amount of shift caused by the stereo conversion processing on the additional information signal, to generate a second locating signal indicating a position of the additional information in a video indicated by the stereo superimposed signal; and a correction unit performs, on the stereo superimposed signal, quality correction for an area other than an area located by the second locating signal.
摘要:
A vertical HPF and a horizontal HPF receive a video signal 101, and extract only a high frequency component in the vertical/horizontal directions, respectively. Absolute value taking parts take an absolute value of the high frequency components, respectively, and change their values to positive values. A horizontal accumulating/adding part and a vertical accumulating/adding part accumulate/add an input signal so as to output a vertical one-dimensional signal and a horizontal one-dimensional signal, respectively, each periodically having a peak value in the respective vertical and horizontal directions. A horizontal peak detecting part detects a horizontal peak position according to the horizontal one-dimensional signal. A vertical peak detecting part detects a vertical peak position according to the vertical one-dimensional signal and identifies a format thereof. A binarization part obtains a block boundary image, according to the horizontal peak position and the vertical peak position, in which pixel positions having a peak are provided with 1 and remaining pixel positions are provided with 0. In this manner, even if a block boundary to eliminate block noise thereon is not clearly identified, it becomes possible to correctly detect and eliminate the block boundary.
摘要:
A broadcasting reception apparatus includes a display unit for presenting a display showing a plurality of channels, with which the user can recognize whether decoding software programs for decoding program signals being currently broadcast via each channel are held in a library buffer, or not, thereby making possible pleasant zapping.
摘要:
A video signal converter converts a first video signal into a second video signal by changing the number of scanning lines. A horizontal pulse synchronized with the first video signal is fed into a PLL circuit, which generates a first clock signal synchronized with the horizontal pulse. The first video signal undergoes A/D conversion by sampling with the first clock signal. The converter receives a first digital video signal which has undergone the A/D conversion, the first clock signal, the horizontal pulse, and a vertical pulse synchronized with the first video signal, and thus changes a number of scanning lines of the first video signal. The converter, next, writes a second digital video signal into a memory by synchronizing the first clock signal. Then, the second digital video signal is read out from the memory by synchronizing a second clock signal generated from another clock signal generator, and is outputted as a third digital video signal, which is converted by a D/A converter into a second video signal having a desirable number of scanning lines and being outputted without video distortion in the horizontal direction.
摘要:
A video signal is reproduced by adjusting the amplitude of a horizontal high frequency signal, a vertical high frequency signal and a vertical temporal high frequency signal. Helper signals can be demodulated even if the helper signal levels vary due to receiving conditions. The number of circuits can be reduced by using a common circuit for amplitude adjustment of the helper signal and for automatic color control of a chrominance signal.
摘要:
A video signal processing device performs signal processing on a baseband video signal decoded from a compressed video signal, and includes: an interpolation phase generating unit which obtains frame repeat information indicating positions of identical frames output sequentially, and generates interpolation phase information for generating an interpolation frame in which a motion between frames is interpolated; a motion vector estimating unit which estimates a motion vector between mutually different frames indicated by the frame repeat information; and an interpolation frame generating unit which generates the interpolation frame using the interpolation phase information and the motion vector, and outputs an output video signal having a frame rate equal to the frame rate of the baseband video signal.
摘要:
An image display device includes: an interpolation phase generator that generates an interpolation phase on the basis of downsampling frame information representing a downsampling timing at which at least one frame image of the image signal is thinned, and an interpolation frame generator that generates an interpolation frame image corresponding to the interpolation phase. The interpolation phase generator generates the interpolation phase such that a phase distance between a first interpolation frame image from among a plurality of interpolation frame images within one period of downsampling periods, and a second interpolation frame image that follows the first interpolation frame image becomes equal to a phase distance between mutually adjacent interpolation frame images obtained when phase distances between a plurality of interpolation frame images are equalized within one period of the downsampling periods.
摘要:
An audio controlling device generates an audio mute signal based on the level of a power-supply voltage supplied from the source equipment, whether a clock signal has been input or not, whether a digital signal has been input or not, whether a multiplier circuit is being locked or not, an error rate, whether an audio clock detection circuit is being locked or not, the presence or absence of a change in a control signal, and whether a synchronization detection circuit is stable or not. The audio controlling device applies the audio mute signal to an audio mute circuit, while applying an OSD control signal to an OSD processing circuit. The audio mute circuit is placed in a mute state or unmute state based on the audio mute signal. The OSD processing circuit provides the on-screen display of a message based on the OSD control signal.