公开(公告)号：US20170170925A1

公开(公告)日：2017-06-15

申请号：US15320757

申请日：2014-08-21

Applicant: ZTE CORPORATION

Inventor： Jun XU ,  Liguang LI ,  Jin XU ,  Kaibo TIAN

IPC: H04L1/00 ,  H04L1/18

CPC classification number: H04L1/0041 ,  H04L1/00 ,  H04L1/0058 ,  H04L1/0061 ,  H04L1/0065 ,  H04L1/1812 ,  H04L1/1819

Abstract: The method includes code block segmentation is performed on a physical layer source data packet, to be sent, having a length of Ks bits, and channel coding is performed on each code block obtained by segmentation, to obtain Cs error-corrected and coded source data sub-packets having lengths of Kc bits; packet coding is performed on the error-corrected and coded source data sub-packets, to obtain Cp check data sub-packets; Ki codeword bits are selected from the ith sub-packet in Cs source data sub-packets, Kj codeword bits are selected from the jth sub-packet in the Cp check data sub-packets, all the selected bits are cascaded together to form a sequence having a length of formula (I), i=0, 1, . . . , Cs−1, j=0, 1, . . . , Cp−1, and the sequence is sent, herein Ks, Cs and Kc are integers greater than 1, and Cp, Ki and Kj are integers greater than or equal to 0.

公开(公告)号：US20250088310A1

公开(公告)日：2025-03-13

申请号：US18936533

申请日：2024-11-04

Applicant: ZTE Corporation

Inventor： Chulong LIANG ,  Wei ZHAO ,  Jin XU ,  Liguang LI ,  Guanghui YU ,  Jian KANG ,  Qiang FU

IPC: H04L1/00

Abstract: Methods, apparatus, and systems that relate to rate matching scheme design for polar coding, PAC coding, or other pre-transformed polar coding are disclosed. In one example aspect, a method for digital communication includes determining, by a first node, an output bit sequence having E bits based on an input bit sequence c having K bits, wherein the output bit sequence is determined based on an output of a polar transform and an output of a repetition operation, and wherein the input of the repetition operation is a portion of a bit sequence before the polar transform. The method also includes transmitting, by the first node, a signal including the output bit sequence to a second node.

公开(公告)号：US20250055595A1

公开(公告)日：2025-02-13

申请号：US18926197

申请日：2024-10-24

Applicant: ZTE Corporation

Inventor： Chulong LIANG ,  Jin XU ,  Wei ZHAO ,  Liguang LI ,  Guanghui YU ,  Jian KANG ,  Qiang FU

IPC: H04L1/00

Abstract: Methods, apparatus, and systems that relate to Polarization-Adjusted Convolutional (PAC) coding with variable lengths are disclosed. In one example aspect, a method for digital communication includes determining, by a first node, an output bit sequence having E bits based on an input bit sequence having K bits. The output bit sequence is determined based on a transform that is applied prior to applying a Polar transform having a size of N. The transform is based on at least one index set that is a subset of a set of bit indices. The set of bit indices comprises all non-negative integers that are less than N and wherein K

公开(公告)号：US20240048160A1

公开(公告)日：2024-02-08

申请号：US18258793

申请日：2021-12-20

Applicant: ZTE CORPORATION

Inventor： Liguang LI ,  Jin XU ,  Guanghui YU ,  Chulong LIANG ,  Jun XU ,  Qiang FU ,  Jian KANG

IPC: H03M13/11

CPC classification number: H03M13/118 ,  H03M13/116

Abstract: A low density parity check encoding method, including: determining a target parity check matrix, where the target parity check matrix belongs to a second parity check matrix set, and a base graph of the second parity check matrix set is extracted from a base graph of a first parity check matrix set and performing low density parity check encoding on data to be transmitted according to the target parity check matrix and a target lifting size.

公开(公告)号：US20220337268A1

公开(公告)日：2022-10-20

申请号：US17843677

申请日：2022-06-17

Applicant: ZTE Corporation

Inventor： Liguang LI ,  Jun XU ,  Jin XU

IPC: H03M13/11 ,  H03M13/00

Abstract: Provided are a processing method and device for quasi-cyclic low density parity check (LDPC) coding. The processing method for LDPC coding includes: determining, according to a data feature of an information bit sequence to be encoded, a processing strategy for the quasi-cyclic LDPC coding according to a data feature of an information bit sequence to be encoded; and performing, according to the processing strategy and based on a base matrix and a lifting size, the quasi-cyclic LDPC coding and rate matching output on the information bit sequence according to the processing strategy, a base matrix and a lifting value. This technical solution is able to improve adaptability and flexibility of the quasi-cyclic LDPC coding.

公开(公告)号：US20220216885A1

公开(公告)日：2022-07-07

申请号：US17584244

申请日：2022-01-25

Applicant: ZTE CORPORATION

Inventor： Liguang LI ,  Jun XU ,  Jin XU

IPC: H03M13/25 ,  H03M13/11 ,  H03M13/00

Abstract: A system and method for allocating network resources are disclosed herein. In one embodiment, the system and method are configured to perform: determining a redundancy version and a new data indicator indicated by control information; determining a base graph of a low density parity check code based on which of a plurality of predefined conditions the redundancy version, and/or the new data indicator satisfy; and sending a signal comprising information bits that are encoded based on the determined base graph of the low density parity check code.

公开(公告)号：US20170359150A1

公开(公告)日：2017-12-14

申请号：US15525178

申请日：2015-04-13

Applicant: ZTE Corporation

Inventor： Jin XU ,  Jun XU ,  Liguang LI

IPC: H04L1/00

CPC classification number: H04L1/0071 ,  H03M13/09 ,  H03M13/1102 ,  H03M13/23 ,  H03M13/2957 ,  H03M13/3738 ,  H03M13/6513 ,  H04L1/0045 ,  H04L1/0054 ,  H04L1/0057 ,  H04L1/0059 ,  H04L1/0061 ,  H04L1/0066

Abstract: Provided are a data checking method and device. The method includes: receiving a transmission signal containing a first data block and transmitted by a transmission node, wherein the length of the first data block is N bits, the first data block is generated by performing an FEC encoding on a second data block which has a length of K bits, and the second data block is generated by performing a CRC encoding on a third data block which has a length of L bits, where N, K and L are all positive integers, and N≧K>L; obtaining a first estimation data block of the first data block according to the transmission signal, and obtaining a second estimation data block of the second data block according to the transmission signal; and checking the third data block according to a relationship between the first estimation data block and an FEC code space and/or a CRC check result of the second estimation data block. By means of the technical solution provided in the present disclosure, the problems that a transmission rate decreases due to the fact that a CRC check code is too long and a false detection rate cannot be ensured due to the fact that the CRC check code is too short are solved.

公开(公告)号：US20170033804A1

公开(公告)日：2017-02-02

申请号：US15118287

申请日：2014-09-04

Applicant: ZTE Corporation

Inventor： Liguang LI ,  Jun XU ,  Zhifeng YUAN ,  Jin XU ,  Kaibo TIAN

IPC: H03M13/11 ,  H03M13/00 ,  H04L1/00 ,  G06F17/16

CPC classification number: H03M13/118 ,  G06F17/16 ,  H03M13/036 ,  H03M13/116 ,  H03M13/1185 ,  H03M13/611 ,  H03M13/616 ,  H04L1/0043 ,  H04L1/0052 ,  H04L1/0058

Abstract: Provided are a method and apparatus for processing information. The apparatus includes: one or more memories, configured to store parameters of one basic parity check matrix set; and one or more processors, configured to encode information bits to be encoded or decode data to be decoded using the basic parity check matrix set Hb, wherein at least 50 percent of short loops-4 in a basic parity check matrix Hbj1 among all basic parity check matrices in the basic parity check matrix set Hb except Hbj0 are the same as short loops-4 in the Hbj0, where j0 is a fixed positive integer between 0 and L−1, L is the number of basic parity check matrices contained in the basic parity check matrix set, and j1=0, 1, . . . , j0−1, j0+1, . . . , L−1.

Abstract translation: 提供了一种用于处理信息的方法和装置。 该装置包括：一个或多个存储器，被配置为存储一个基本奇偶校验矩阵集的参数; 以及一个或多个处理器，被配置为对要编码的信息比特进行编码或使用基本奇偶校验矩阵集合Hb解码要解码的数据，其中，所有基本奇偶校验中的基本奇偶校验矩阵Hbj1中的短循环-4的至少50％ Hbj0以外的基本奇偶校验矩阵集Hb中的校验矩阵与Hbj0中的短循环-4相同，其中j0是0和L-1之间的固定正整数，L是包含在基本奇偶校验矩阵集合中的基本奇偶校验矩阵的数量 基本奇偶校验矩阵集，j1 = 0，1，。 。 。 ，j0-1，j0 + 1，...。 。 。 ，L-1。