公开(公告)号：US20240364916A1

公开(公告)日：2024-10-31

申请号：US18768349

申请日：2024-07-10

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N19/513 ,  H04N19/132 ,  H04N19/176 ,  H04N19/563

CPC classification number: H04N19/513 ,  H04N19/132 ,  H04N19/176 ,  H04N19/563

Abstract: The present disclosure provides systems and methods for video coding. The systems include, for example, an image encoder comprising: circuitry; and a memory coupled to the circuitry, wherein the circuitry, in operation, performs the following: predicting a first block of prediction samples for a current block of a picture, wherein predicting the first block of prediction samples includes at least a prediction process with a motion vector from a different picture; padding the first block of prediction samples to form a second block of prediction samples, wherein the second block is larger than the first block; calculating at least a gradient using the second block of prediction samples; and encoding the current block using at least the calculated gradient.

公开(公告)号：US12126795B2

公开(公告)日：2024-10-22

申请号：US17943971

申请日：2022-09-13

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ru Ling Liao ,  Chong Soon Lim ,  Hai Wei Sun ,  Han Boon Teo ,  Jing Ya Li ,  Sughosh Pavan Shashidhar ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/105 ,  H04N19/159 ,  H04N19/176 ,  H04N19/46

CPC classification number: H04N19/105 ,  H04N19/159 ,  H04N19/176 ,  H04N19/46

Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.

公开(公告)号：US12096005B2

公开(公告)日：2024-09-17

申请号：US18376618

申请日：2023-10-04

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Masato Ohkawa ,  Hideo Saitou ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Ryuichi Kanoh

IPC: H04N19/61 ,  H04N19/159 ,  H04N19/176 ,  H04N19/625

CPC classification number: H04N19/159 ,  H04N19/176 ,  H04N19/61 ,  H04N19/625

Abstract: An encoder which encodes a current block of a picture includes a processor and memory. Using the memory, the processor: determines whether intra prediction is to be used for the current block; and when it is determined that intra prediction is to be used for the current block, generates first transform coefficients by performing first transform of residual signals of the current block using a first transform basis; quantizes the first transform coefficients when an intra prediction mode for the current block is a determined mode and the first transform basis is different from a determined transform basis; and generates second transform coefficients by performing second transform of the first transform coefficients using a second transform basis, and quantizes the second transform coefficients, when the intra prediction mode for the current block is not the determined mode or when the first transform basis matches the determined transform basis.

公开(公告)号：US12088791B2

公开(公告)日：2024-09-10

申请号：US17946784

申请日：2022-09-16

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ru Ling Liao ,  Chong Soon Lim ,  Hai Wei Sun ,  Han Boon Teo ,  Jing Ya Li ,  Sughosh Pavan Shashidhar ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/105 ,  H04N19/159 ,  H04N19/176 ,  H04N19/46

CPC classification number: H04N19/105 ,  H04N19/159 ,  H04N19/176 ,  H04N19/46

Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.

公开(公告)号：US20240297986A1

公开(公告)日：2024-09-05

申请号：US18657222

申请日：2024-05-07

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ru Ling LIAO ,  Chong Soon Lim ,  Jing Ya Li ,  Han Boon Teo ,  Hai Wei Sun ,  Che Wei Kuo ,  Yusuke Kato ,  Tadamasa Toma ,  Kiyofumi Abe ,  Takahiro Nishi

IPC: H04N19/107 ,  H04N19/176

CPC classification number: H04N19/107 ,  H04N19/176

Abstract: An image encoder includes: circuitry; and a memory coupled to the circuitry. The circuitry, in operation: calculates first values of a current block using intra prediction, the intra prediction being limited to planar mode, the planar mode using multiple reference pixels for each pixel location of the current block; calculates second values of the current block using inter prediction; calculates third values of the current block by weighting the first values and the second values; and encodes the current block using the third values, and in the calculating of the third values, a first weight is applied to the first values and a second weight is applied to the second values, the second weight being different from the first weight.

公开(公告)号：US12081748B2

公开(公告)日：2024-09-03

申请号：US17868199

申请日：2022-07-19

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Han Boon Teo ,  Hai Wei Sun ,  Chong Soon Lim ,  Jing Ya Li ,  Chu Tong Wang ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/117 ,  H04N19/105 ,  H04N19/46 ,  H04N19/80

CPC classification number: H04N19/117 ,  H04N19/105 ,  H04N19/46 ,  H04N19/80

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry: executes a second process of applying a second filter to the first image to generate a second image, not holding the second image as a reference image, holding the first image as a reference image, and displaying the second image; writes coefficients of each of one or more filter candidates that are candidates for the second filter into a bitstream, wherein the coefficients are included in a first storage location when written into the bitstream; and writes a parameter that specifies, for each image, one of the one or more filter candidates as the second filter into the bitstream, wherein the parameter is included in a second storage location when written into the bitstream, and the second storage location is different from the first storage location.

公开(公告)号：US12075052B2

公开(公告)日：2024-08-27

申请号：US17499294

申请日：2021-10-12

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/126 ,  H04N19/159 ,  H04N19/176 ,  H04N19/61

CPC classification number: H04N19/126 ,  H04N19/159 ,  H04N19/176 ,  H04N19/61

Abstract: Provided is an encoder including: circuitry; and memory coupled to the circuitry, in which the circuitry: derives a prediction residual indicating a difference between a current block and a prediction image of the current block; performs primary transform on the prediction residual, and performs secondary transform on a result of the primary transform; performs quantization on a result of the secondary transform; and encodes a result of the quantization. In the performing of the secondary transform, when a matrix weighted intra prediction included in intra prediction and having prediction modes is used, the circuitry uses, as a transform set for the secondary transform, a common transform set shared among the prediction modes. The matrix weighted intra prediction generates the prediction image by performing matrix calculation on a pixel sequence obtained from pixel values of surrounding pixels of the current block.

公开(公告)号：US12069256B2

公开(公告)日：2024-08-20

申请号：US18451690

申请日：2023-08-17

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ryuichi Kanoh ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/117 ,  H04N19/103 ,  H04N19/176 ,  H04N19/182

CPC classification number: H04N19/117 ,  H04N19/103 ,  H04N19/176 ,  H04N19/182

Abstract: Various embodiments provide a decoder configured to select a filter based on a block size of a first block and a block size of a second block in an image, and change values of pixels in the first block and the second block. The filter includes a first set of multipliers and a first set of offsets for the first block, and a second set of multipliers and a second set of offsets for the second block. The values of the pixels in the first block and the second block are changed by performing multiplication with each multiplier in the first set of multipliers, by performing multiplication with each multiplier in the second set of multipliers, and by using the first set of offsets and the second set of offsets.

公开(公告)号：US20240276010A1

公开(公告)日：2024-08-15

申请号：US18643348

申请日：2024-04-23

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh

IPC: H04N19/537 ,  H04N19/105 ,  H04N19/157 ,  H04N19/52 ,  H04N19/573

CPC classification number: H04N19/537 ,  H04N19/105 ,  H04N19/157 ,  H04N19/52 ,  H04N19/573

Abstract: An encoder includes memory and circuitry. The circuitry: derives a first motion vector in a unit of a prediction block using a first inter frame prediction mode that uses a degree of matching between two reconstructed images of two regions in two difference pictures, the prediction block being obtained by splitting an image included in a video; and performs, in the unit of the prediction block, a first motion compensation process that generates a prediction image by referring to a spatial gradient of luminance in an image generated by performing motion compensation using the first motion vector derived.

公开(公告)号：US12063390B2

公开(公告)日：2024-08-13

申请号：US18242747

申请日：2023-09-06

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon Lim ,  Han Boon Teo ,  Takahiro Nishi ,  Tadamasa Toma ,  Ru Ling Liao ,  Sughosh Pavan Shashidhar ,  Hai Wei Sun

IPC: H04N19/597 ,  G06T5/80 ,  H04N5/00 ,  H04N19/159 ,  H04N19/176 ,  H04N19/46 ,  H04N19/85

CPC classification number: H04N19/597 ,  G06T5/80 ,  H04N19/159 ,  H04N19/176 ,  H04N19/46 ,  H04N19/85

Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.