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公开(公告)号:US5197050A
公开(公告)日:1993-03-23
申请号:US594915
申请日:1990-10-09
Applicant: Akemi Murakami , Shoji Yamaguchi , Kaoru Yasukawa , Takashi Nomiyama , Daisuke Iguchi
Inventor: Akemi Murakami , Shoji Yamaguchi , Kaoru Yasukawa , Takashi Nomiyama , Daisuke Iguchi
IPC: G11B11/10 , G11B11/105 , G11B13/04
CPC classification number: G11B13/04 , G11B11/10532 , G11B11/10554 , G11B11/1058
Abstract: A flying head assembly for a magneto-optical recording drive includes a first head portion of a nonmagnetic material, and a second head portion mounted in an aperture through the first head portion. The second head portion and aperture define an annular path through the first head portion. A coil for generating a magnetic field is wrapped concentrically around the aperture, either inside or outside of the second head portion. A laser light beam is reflected into the annular path and focused onto a recording medium.
Abstract translation: 用于磁光记录驱动器的飞头组件包括非磁性材料的第一头部和安装在穿过第一头部的孔中的第二头部。 第二头部和孔限定穿过第一头部的环形路径。 用于产生磁场的线圈在第二头部的内部或外部同心地包围孔。 激光束被反射到环形路径中并聚焦到记录介质上。
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公开(公告)号:USD872661S1
公开(公告)日:2020-01-14
申请号:US29645115
申请日:2018-04-24
Applicant: Hideo Koyama , Daisuke Iguchi , Shun Kawaguchi , Tatsuya Sonoda
Designer: Hideo Koyama , Daisuke Iguchi , Shun Kawaguchi , Tatsuya Sonoda
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公开(公告)号:USD872652S1
公开(公告)日:2020-01-14
申请号:US29645105
申请日:2018-04-24
Applicant: Hideo Koyama , Daisuke Iguchi , Shun Kawaguchi , Junya Furuta , Tatsuya Sonoda
Designer: Hideo Koyama , Daisuke Iguchi , Shun Kawaguchi , Junya Furuta , Tatsuya Sonoda
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公开(公告)号:USD774426S1
公开(公告)日:2016-12-20
申请号:US29520000
申请日:2015-03-10
Applicant: Ian Richard Cartabiano , Hideo Koyama , Daisuke Iguchi
Designer: Ian Richard Cartabiano , Hideo Koyama , Daisuke Iguchi
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公开(公告)号:US08736074B2
公开(公告)日:2014-05-27
申请号:US12624490
申请日:2009-11-24
Applicant: Daisuke Iguchi , Kanji Otsuka , Yutaka Akiyama
Inventor: Daisuke Iguchi , Kanji Otsuka , Yutaka Akiyama
CPC classification number: H01L23/66 , H01L24/17 , H01L24/73 , H01L25/0652 , H01L25/0657 , H01L25/18 , H01L2223/6638 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/13099 , H01L2224/16 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2225/0651 , H01L2225/06517 , H01L2225/06531 , H01L2225/06562 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
Abstract: According to an aspect of the invention, a semiconductor device includes a substrate having an opening area, a first semiconductor chip, and a second semiconductor chip. The first semiconductor chip has a first electrode for high-speed communication and that is disposed around the opening area on the substrate. The second semiconductor chip has a second electrode and third electrode for power and low-speed communication and that is disposed on the first semiconductor chip so that the first electrode is coupled with the second electrode by electrostatic coupling and dielectric coupling, the third electrode facing the opening area.
Abstract translation: 根据本发明的一个方面,半导体器件包括具有开口面积的衬底,第一半导体芯片和第二半导体芯片。 第一半导体芯片具有用于高速连通的第一电极,并且设置在基板上的开口区域周围。 第二半导体芯片具有用于功率和低速连通的第二电极和第三电极,并且设置在第一半导体芯片上,使得第一电极通过静电耦合和电介质耦合与第二电极耦合,第三电极面向 开放区域。
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公开(公告)号:USD680037S1
公开(公告)日:2013-04-16
申请号:US29409251
申请日:2011-12-21
Applicant: Shuzo Akamine , Atsushi Hirose , Daisuke Iguchi , Masahiro Ookuni
Designer: Shuzo Akamine , Atsushi Hirose , Daisuke Iguchi , Masahiro Ookuni
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公开(公告)号:US20100289156A1
公开(公告)日:2010-11-18
申请号:US12624490
申请日:2009-11-24
Applicant: Daisuke IGUCHI , Kanji OTSUKA , Yutaka AKIYAMA
Inventor: Daisuke IGUCHI , Kanji OTSUKA , Yutaka AKIYAMA
IPC: H01L25/07
CPC classification number: H01L23/66 , H01L24/17 , H01L24/73 , H01L25/0652 , H01L25/0657 , H01L25/18 , H01L2223/6638 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/13099 , H01L2224/16 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2225/0651 , H01L2225/06517 , H01L2225/06531 , H01L2225/06562 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
Abstract: According to an aspect of the invention, a semiconductor device includes a substrate having an opening area, a first semiconductor chip, and a second semiconductor chip. The first semiconductor chip has a first electrode for high-speed communication and that is disposed around the opening area on the substrate. The second semiconductor chip has a second electrode and third electrode for power and low-speed communication and that is disposed on the first semiconductor chip so that the first electrode is coupled with the second electrode by electrostatic coupling and dielectric coupling, the third electrode facing the opening area.
Abstract translation: 根据本发明的一个方面,半导体器件包括具有开口面积的衬底,第一半导体芯片和第二半导体芯片。 第一半导体芯片具有用于高速连通的第一电极,并且设置在基板上的开口区域周围。 第二半导体芯片具有用于功率和低速连通的第二电极和第三电极,并且设置在第一半导体芯片上,使得第一电极通过静电耦合和电介质耦合与第二电极耦合,第三电极面向 开放区域。
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公开(公告)号:US20100013318A1
公开(公告)日:2010-01-21
申请号:US12501931
申请日:2009-07-13
Applicant: Daisuke Iguchi , Kanji Otsuka , Yutaka Akiyama
Inventor: Daisuke Iguchi , Kanji Otsuka , Yutaka Akiyama
IPC: H05K9/00
CPC classification number: H05K9/0084 , H05K1/0218 , H05K1/0234 , H05K1/167 , H05K3/403 , H05K2201/0187 , H05K2201/0215 , H05K2201/09309
Abstract: A printed circuit board includes a ground layer, a power source layer, a signal wiring layer, an insulating layer and an electromagnetic radiation suppressing member. The power source layer is provided to be opposed to the ground layer. The signal wiring layer transmits a signal in a predetermined frequency domain. The insulating layer insulates the ground layer, the power source layer and the signal wiring layer from one another. The electromagnetic radiation suppressing member is provided to cover a circumferential edge of the insulating layer. The electromagnetic radiation suppressing member has a negative dielectric constant and a positive magnetic permeability in a frequency domain including the predetermined frequency domain.
Abstract translation: 印刷电路板包括接地层,电源层,信号布线层,绝缘层和电磁辐射抑制构件。 电源层设置成与接地层相对。 信号布线层发送预定频域的信号。 绝缘层使接地层,电源层和信号布线层彼此绝缘。 电磁辐射抑制构件被设置成覆盖绝缘层的周缘。 电磁辐射抑制构件在包括预定频域的频域中具有负介电常数和正磁导率。
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