公开(公告)号：US08952623B2

公开(公告)日：2015-02-10

申请号：US13281366

申请日：2011-10-25

申请人： Sean S. Chen ,  Jeff Kotowski ,  Timothy James Herklots

发明人： Sean S. Chen ,  Jeff Kotowski ,  Timothy James Herklots

IPC分类号： H05B41/16

CPC分类号： G09G3/342 ,  G09G2320/0233 ,  G09G2320/064

摘要： The disclosed multi-channel driver equalizer circuit matches currents in multiple strings of illumination devices at low current levels by using an analog equalizer to sequentially couple the output of a reference amplifier in series with each current source amplifier in a current limit loop of the driver equalizer circuit to correct the offsets of the current source amplifiers, resulting in the matching of string currents on average.

摘要翻译： 所公开的多通道驱动均衡器电路通过使用模拟均衡器在多个照明装置串中的电流匹配电流，所述模拟均衡器在驱动器均衡器的限流回路中将参考放大器的输出与每个电流源放大器串联耦合 电路来校正电流源放大器的偏移，导致串电流的匹配平均。

公开(公告)号：US08604699B2

公开(公告)日：2013-12-10

申请号：US13314069

申请日：2011-12-07

申请人： Jeff Kotowski ,  Timothy James Herklots ,  Charles Cai

发明人： Jeff Kotowski ,  Timothy James Herklots ,  Charles Cai

IPC分类号： H05B37/02

CPC分类号： H05B33/0818

摘要： The disclosed implementations utilize the voltage drop inherent in the device string to power a device control IC. In some implementations, current is drawn from the bottom of the device string and applied to a voltage supply pin of the device control IC. In some implementations, current is drawn from some other location in the device string (e.g., near the bottom or midpoint of the device string) using a switch. In some implementations, current is drawn from near the bottom and the bottom of the device string at different times, such that less current is drawn from the bottom of the device string as the duty cycle of the device string increases and more current is drawn from near the bottom of the device string as the duty cycle of the device string increases.

摘要翻译： 所公开的实现使用设备串中固有的电压降来为器件控制IC供电。 在一些实施方式中，电流从器件串的底部抽出并施加到器件控制IC的电压引脚。 在一些实施方式中，使用开关从设备串中的某个其他位置（例如，设备串的底部或中点附近）绘出电流。 在一些实施方式中，在不同时间从设备串的底部和底部接近电流，从而当器件串的占空比增加并且从 靠近设备串的底部，随着设备串的占空比增加。

公开(公告)号：US08575863B2

公开(公告)日：2013-11-05

申请号：US13291943

申请日：2011-11-08

申请人： Charles Cai ,  Jeff Kotowski ,  Timothy James Herklots

发明人： Charles Cai ,  Jeff Kotowski ,  Timothy James Herklots

IPC分类号： G05F1/00 ,  H05B37/02 ,  H05B39/04 ,  H05B41/36

CPC分类号： H05B33/0815 ,  H05B33/0827

摘要： A color correcting device driver is configured to vary the equivalent current into light emitting elements (e.g., LEDs) with the frequency of the AC input current (e.g., 120 Hz). In implementations that include a fly-back controller with a power factor correction (PFC) controller on the primary side, the color correcting device driver performs the method of: 1) turning on the loads (e.g., white and CA strings of LEDs); 2) determining if the voltage supplied to the loads has dropped by a first threshold amount; 3) turning off the loads; and 4) determining if the voltage supplied to loads has recovered by a second threshold amount (or waiting for a fixed amount of time). The method is repeated. In implementations that do not include a PFC controller on the primary side, the color correcting device driver can create a pulse width modulated (PWM) signal.

公开(公告)号：US20130113445A1

公开(公告)日：2013-05-09

申请号：US13289603

申请日：2011-11-04

申请人： Charles Cai ,  Jeff Kotowski ,  Kien Vi

发明人： Charles Cai ,  Jeff Kotowski ,  Kien Vi

IPC分类号： G05F1/10

CPC分类号： H02M3/158 ,  H02M3/156 ,  H05B33/0812 ,  H05B33/0815 ,  H05B33/0842 ,  H05B37/02 ,  Y02B20/343 ,  Y02B20/42 ,  Y10S323/901

摘要： A power conversion circuit of two feedback loops is disclosed that includes a feedback control circuit for ramping up or down a commanded voltage to a load (e.g., LEDs). The second feedback loop feeds into the first feedback loop, and the second feedback loop operates at a slower bandwidth than the first feedback loop. When ramping up or down the commanded voltage, a voltage overshoot results because of delay in the system. The overshoot can be compensated for by a final adjustment to the commanded voltage.

摘要翻译： 公开了两个反馈回路的功率转换电路，其包括用于将指令电压上升或下降到负载（例如，LED）的反馈控制电路。 第二反馈环馈入第一反馈环路，第二反馈环路以比第一反馈环路更慢的带宽工作。 当升高或降低指令电压时，由于系统的延迟而导致电压过冲。 可以通过对指令电压进行最终调整来补偿过冲。

公开(公告)号：US20130082621A1

公开(公告)日：2013-04-04

申请号：US13249158

申请日：2011-09-29

申请人： Jeff Kotowski ,  Charles Cai ,  Ranajit Ghoman

发明人： Jeff Kotowski ,  Charles Cai ,  Ranajit Ghoman

IPC分类号： H05B37/02 ,  H02M7/06

CPC分类号： H05B33/0815 ,  H02M1/4225 ,  Y02B20/346 ,  Y02B70/126

摘要： A primary side PFC driver circuit is disclosed that includes a switch control circuit for commanding a switch to allow an inductor coupled to an output load (e.g., LEDs) to transfer energy provided by an input voltage source. The switch control circuit provides two signals for commanding the switch. A first signal having a first frequency, with a duty cycle in proportion to the input voltage amplitude, commands the switch to allow the average input current to be proportional to the input voltage amplitude. A second signal having a second frequency higher than the first frequency pulses the output load with substantially constant current pulses based on a value of the first signal (e.g., while the first signal is high). The current pulses produce a substantially constant current in the output load.

摘要翻译： 公开了一种初级侧PFC驱动器电路，其包括用于命令开关允许耦合到输出负载（例如，LED）的电感器传递由输入电压源提供的能量的开关控制电路。 开关控制电路提供两个指示开关的信号。 具有与输入电压幅度成比例的占空比的具有第一频率的第一信号命令开关允许平均输入电流与输入电压幅度成正比。 具有高于第一频率的第二频率的第二信号基于第一信号的值（例如，当第一信号为高时）以基本上恒定的电流脉冲来脉冲输出负载。 电流脉冲在输出负载中产生基本恒定的电流。

公开(公告)号：US20100109768A1

公开(公告)日：2010-05-06

申请号：US12263075

申请日：2008-10-31

申请人： Jeff Kotowski ,  Qizhang Yin

发明人： Jeff Kotowski ,  Qizhang Yin

IPC分类号： H03F3/38 ,  H03F3/217

CPC分类号： H03F3/217

摘要： The present disclosure provides a method and apparatus for high performance class D audio amplifier circuit that includes: a modulator circuit for receiving a PWM input signal and generating a control signal, a driver control circuit, a switching circuit, and a feedback circuit. The driver control circuit is adapted to generate a drive signal for the switching circuit. The driving signal provides compensation for noise and distortions in a PWM output signal at each cycle by selecting either a first pulse signal or a second pulse signal based on the information of the control signal.

摘要翻译： 本公开提供了一种用于高性能D类音频放大器电路的方法和装置，包括：用于接收PWM输入信号并产生控制信号的调制器电路，驱动器控制电路，开关电路和反馈电路。 驱动器控制电路适于产生用于开关电路的驱动信号。 驱动信号通过基于控制信号的信息选择第一脉冲信号或第二脉冲信号来在每个周期对PWM输出信号中的噪声和失真提供补偿。

公开(公告)号：US20090140774A1

公开(公告)日：2009-06-04

申请号：US11949626

申请日：2007-12-03

申请人： Jeff Kotowski ,  Shane Hollmer

发明人： Jeff Kotowski ,  Shane Hollmer

IPC分类号： G01R23/02

CPC分类号： G06F13/4295

摘要： A system and method are provided for communicating data among chained circuits. In operation, a period of a signal communicated between a chain of circuits is identified. Additionally, a state of the signal is determined, based on the period of the signal.

摘要翻译： 提供了用于在链接电路之间传送数据的系统和方法。 在操作中，识别在链路链路之间传送的信号的周期。 另外，基于信号的周期来确定信号的状态。

公开(公告)号：US5404054A

公开(公告)日：1995-04-04

申请号：US925994

申请日：1992-08-06

申请人： Jeff Kotowski

发明人： Jeff Kotowski

IPC分类号： H03K5/08 ,  H03K5/24

CPC分类号： H03K5/088

摘要： The present invention provides dynamic hysteresis for threshold detection circuitry. The hysteresis decay pattern, rate of decay, and minimum separation between the HSP and LSP are programmable. In particular, the hysteresis decay pattern may be programmed, in any manner, so that it has a better correlation to the amplitude of the input signal. The preferred embodiment of the present invention includes a comparator circuit, digital logic, and a digital-to-analog converter circuit. The comparator circuit has a fixed LSP and a programmable HSP for detecting threshold crossings of the input signal in order to accurately generate a pulse train. The HSP includes hysteresis for providing greater immunity to noise for an input signal having an amplitude which varies with frequency. The hysteresis of the HSP decays linearly at a programmable rate unlike prior art threshold detectors having a fixed rate of exponential decay determined by resistor and capacitor values. The magnitude of hysteresis decays until either the input signal crosses an intermediate HSP value or it reaches a last value and stops decreasing. Also, the minimum separation between the HSP and LSP is controlled by a digital-to-analog conversion circuit having digitally programmable levels. While the preferred embodiment provides a linearly decreasing hysteresis pattern, the digital logic of the present invention may be implemented with a memory device for storing programmable hysteresis patterns.

摘要翻译： 本发明提供了阈值检测电路的动态滞后。 滞后衰减模式，衰减速率和HSP与LSP之间的最小间隔可编程。 特别地，滞后衰减模式可以以任何方式被编程，使得其与输入信号的幅度具有更好的相关性。 本发明的优选实施例包括比较器电路，数字逻辑和数模转换器电路。 比较器电路具有固定LSP和可编程HSP，用于检测输入信号的阈值交叉，以便精确地产生脉冲串。 HSP包括用于为具有随频率变化的幅度的输入信号提供更大的噪声抗扰度的滞后。 与现有技术的具有由电阻器和电容器值确定的指数衰减速率的阈值检测器相比，HSP的滞后可以可编程速率线性衰减。 滞后的幅度衰减直到输入信号跨越中间HSP值或达到最后一个值并停止下降。 此外，HSP和LSP之间的最小间隔由具有数字可编程电平的数模转换电路控制。 虽然优选实施例提供线性减小的滞后模式，但是本发明的数字逻辑可以用用于存储可编程滞后模式的存储器件来实现。